From 44fa0d4ca00fa4ca88415b7ca717767dd31f83f7 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Mon, 28 Dec 2020 15:00:39 +0100 Subject: soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For easier review of the switch to a new register struct in the follow-up change, the panel delay times get converted from destination register raw format to milliseconds representation in this change. Formula for conversion of power cycle delay: gpu_panel_power_cycle_delay_ms = (gpu_panel_power_cycle_delay - 1) * 100 Formula for all others: gpu_panel_power_X_delay_ms = gpu_panel_power_X_delay / 10 The register names gain a suffix `_ms` and calculation of the destination register raw values gets done in gma code now. Change-Id: Idf8e076dac2b3048a63a0109263a6e7899f07230 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/48958 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Angel Pons --- src/mainboard/google/auron/variants/lulu/overridetree.cb | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/mainboard/google/auron/variants/lulu') diff --git a/src/mainboard/google/auron/variants/lulu/overridetree.cb b/src/mainboard/google/auron/variants/lulu/overridetree.cb index 81110408c1..cb7fb62b34 100644 --- a/src/mainboard/google/auron/variants/lulu/overridetree.cb +++ b/src/mainboard/google/auron/variants/lulu/overridetree.cb @@ -1,11 +1,11 @@ chip soc/intel/broadwell # Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "70" # 7ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "7" + register "gpu_panel_power_backlight_off_delay_ms" = "210" device domain 0 on chip soc/intel/broadwell/pch -- cgit v1.2.3