From 760970fb38157fc9023a3d71efaa8585bbdc9d7b Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 8 Jan 2019 09:32:44 +0200 Subject: AGESA fam16kb boards: Clean up devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove double nesting of chip northbridge/amd. There is requirement to keep SPD address map in the same chip block with device 0:18.2. Change-Id: Id3a161c54341d0c5c569ea6118ee6f890b7f62e6 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30735 Reviewed-by: HAOUAS Elyes Reviewed-by: Angel Pons Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/mainboard/gizmosphere/gizmo2/devicetree.cb | 51 +++++++++++++------------- 1 file changed, 25 insertions(+), 26 deletions(-) (limited to 'src/mainboard/gizmosphere/gizmo2/devicetree.cb') diff --git a/src/mainboard/gizmosphere/gizmo2/devicetree.cb b/src/mainboard/gizmosphere/gizmo2/devicetree.cb index 896c03d02f..e35249e734 100644 --- a/src/mainboard/gizmosphere/gizmo2/devicetree.cb +++ b/src/mainboard/gizmosphere/gizmo2/devicetree.cb @@ -21,40 +21,39 @@ chip northbridge/amd/agesa/family16kb/root_complex device domain 0 on subsystemid 0x1022 0x1410 inherit - chip northbridge/amd/agesa/family16kb # CPU side of HT root complex + chip northbridge/amd/agesa/family16kb + device pci 0.0 on end # Root Complex + device pci 1.0 on end # Internal Graphics P2P bridge 0x9835 + device pci 1.1 on end # Internal Multimedia + device pci 2.0 on end # PCIe Host Bridge + device pci 2.1 on end # PCIe GFX Bridge + device pci 2.2 on end # PCIe GPP mini PCIe + device pci 2.3 on end # PCIe LAN + device pci 2.4 on end # PCIe x2 to high speed edge connector + device pci 2.5 on end # PCIe x2 to high speed edge connector + end #chip northbridge/amd/agesa/family16kb - chip northbridge/amd/agesa/family16kb # PCI side of HT root complex - device pci 0.0 on end # Root Complex - device pci 1.0 on end # Internal Graphics P2P bridge 0x9835 - device pci 1.1 on end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # PCIe GFX Bridge - device pci 2.2 on end # PCIe GPP mini PCIe - device pci 2.3 on end # PCIe LAN - device pci 2.4 on end # PCIe x2 to high speed edge connector - device pci 2.5 on end # PCIe x2 to high speed edge connector - end #chip northbridge/amd/agesa/family16kb - - chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus - device pci 10.0 on end # XHCI HC0 - device pci 11.0 on end # SATA - device pci 12.0 on end # USB - device pci 12.2 on end # USB - device pci 13.0 on end # USB - device pci 13.2 on end # USB - device pci 14.0 on end # SM - device pci 14.2 on end # HDA 0x4383 - device pci 14.3 on end # LPC 0x439d - device pci 14.7 on end # SD - end #chip southbridge/amd/agesa/hudson + chip southbridge/amd/agesa/hudson # it is under NB/SB Link, but on the same pci bus + device pci 10.0 on end # XHCI HC0 + device pci 11.0 on end # SATA + device pci 12.0 on end # USB + device pci 12.2 on end # USB + device pci 13.0 on end # USB + device pci 13.2 on end # USB + device pci 14.0 on end # SM + device pci 14.2 on end # HDA 0x4383 + device pci 14.3 on end # LPC 0x439d + device pci 14.7 on end # SD + end #chip southbridge/amd/agesa/hudson + chip northbridge/amd/agesa/family16kb device pci 18.0 on end device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end device pci 18.4 on end device pci 18.5 on end + end - end #chip northbridge/amd/agesa/family16kb # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family16kb/root_complex -- cgit v1.2.3