From 24c1f94258d52402494f17f6e34cd489009c01f9 Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Thu, 13 Feb 2020 15:39:42 +0000 Subject: gizmosphere/gizmo2: Switch away from ROMCC_BOOTBLOCK Warning: Not tested on hardware. Signed-off-by: Mike Banon Change-Id: Iad86755952204bb1a56ef341e626b0627a958467 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38868 Reviewed-by: HAOUAS Elyes Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/mainboard/gizmosphere/gizmo2/bootblock.c | 31 ++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 src/mainboard/gizmosphere/gizmo2/bootblock.c (limited to 'src/mainboard/gizmosphere/gizmo2/bootblock.c') diff --git a/src/mainboard/gizmosphere/gizmo2/bootblock.c b/src/mainboard/gizmosphere/gizmo2/bootblock.c new file mode 100644 index 0000000000..312b5cc0a6 --- /dev/null +++ b/src/mainboard/gizmosphere/gizmo2/bootblock.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +void bootblock_mainboard_early_init(void) +{ +#if 0 + volatile u32 i, val; + + /* LPC clock? Should happen before enable_serial. */ + + /* + * On Larne, after LpcClkDrvSth is set, it needs some time to be stable, + * because of the buffer ICS551M + */ + for (i = 0; i < 200000; i++) + val = inb(0xcd6); +#endif +} -- cgit v1.2.3