From 56cf01f29d7549f11cdd329d5ca8a2e163665f3a Mon Sep 17 00:00:00 2001
From: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Date: Mon, 25 Feb 2008 19:36:20 +0000
Subject: This patch adds automatic fan control for the CPU fan on the m57sli
 board.

This is done via the ec_init routine in a source file in the
mainboard/gigabyte/m57sli directory. A Config variable 'HAVE_FANCTL' has been
added to notify superio.c to get the ec_init externally.

I (Ward) have tested this on the PLCC and the SOIC/SPI version of this board.
It works.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/gigabyte/m57sli/Config.lb  |  4 +++
 src/mainboard/gigabyte/m57sli/Options.lb |  6 ++++
 src/mainboard/gigabyte/m57sli/fanctl.c   | 57 ++++++++++++++++++++++++++++++++
 3 files changed, 67 insertions(+)
 create mode 100644 src/mainboard/gigabyte/m57sli/fanctl.c

(limited to 'src/mainboard/gigabyte')

diff --git a/src/mainboard/gigabyte/m57sli/Config.lb b/src/mainboard/gigabyte/m57sli/Config.lb
index 5f34c9eeb5..127ce0309b 100644
--- a/src/mainboard/gigabyte/m57sli/Config.lb
+++ b/src/mainboard/gigabyte/m57sli/Config.lb
@@ -206,6 +206,10 @@ else
     end
 end
 
+if HAVE_FANCTL
+	object fanctl.o
+end
+
 ##
 ## Setup RAM
 ##
diff --git a/src/mainboard/gigabyte/m57sli/Options.lb b/src/mainboard/gigabyte/m57sli/Options.lb
index 149bbde94c..88d311bf24 100644
--- a/src/mainboard/gigabyte/m57sli/Options.lb
+++ b/src/mainboard/gigabyte/m57sli/Options.lb
@@ -115,6 +115,7 @@ uses WAIT_BEFORE_CPUS_INIT
 
 uses CONFIG_USE_PRINTK_IN_CAR
 
+uses HAVE_FANCTL
 ###
 ### Build options
 ###
@@ -139,6 +140,11 @@ default FAILOVER_SIZE=0x01000
 #more 1M for pgtbl
 default CONFIG_LB_MEM_TOPK=2048
 
+##
+## Set-up automatic fan control
+##
+default HAVE_FANCTL=1
+
 ##
 ## Build code for the fallback boot
 ##
diff --git a/src/mainboard/gigabyte/m57sli/fanctl.c b/src/mainboard/gigabyte/m57sli/fanctl.c
new file mode 100644
index 0000000000..8b74014dbd
--- /dev/null
+++ b/src/mainboard/gigabyte/m57sli/fanctl.c
@@ -0,0 +1,57 @@
+#include <arch/io.h>
+
+static void write_index(uint16_t port_base, uint8_t reg, uint8_t value)
+{
+	outb(reg, port_base);
+	outb(value, port_base + 1);
+}
+
+static const struct {
+	uint8_t index, value;
+} sequence[]= {
+	/* Set FAN_CTL control register (0x14) polarity to high, and
+	   activate fans 1, 2 and 3. */
+	{ 0x14, 0x87},
+	/* set the correct sensor types 1,2 thermistor; 3 diode */
+	{ 0x51, 0x1c},
+	/* set the 'zero' voltage for diode type sensor */
+	{ 0x5c, 0x80},
+//	{ 0x56, 0xe5},
+//	{ 0x57, 0xe5},
+	{ 0x59, 0xe5},
+	{ 0x5c, 0x00},
+	/* fan1 (controlled by temp3) control parameters */
+	/* fan off limit */
+	{ 0x60, 0xff},
+	/* fan start limit */
+	{ 0x61, 0x14},
+	/* ???? */
+//	{ 0x62, 0x00},
+	/* start PWM */
+	{ 0x63, 0x27},
+	/* smooth and slope PWM */
+	{ 0x64, 0x90},
+	/* direct-down and interval */
+	{ 0x65, 0x03},
+	/* fan1 auto controlled by temp3 */
+	{ 0x15, 0x82},
+	/* fan2 soft controlled, max speed */
+	{ 0x16, 0x7f},
+	/* fan3 soft controlled, 75% speed */
+	{ 0x17, 0x60},
+	/* all fans enable, fan1 ctl smart */
+	{ 0x13, 0x71}
+};
+
+#define ARRAYSIZE(x) sizeof x/sizeof *x
+
+/*
+ * Called from superio.c
+ */
+void init_ec(uint16_t base)
+{
+	int i;
+	for (i=0; i<ARRAYSIZE(sequence); i++) {
+		write_index(base, sequence[i].index, sequence[i].value);
+	}
+}
-- 
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