From 0e92974904703272b55d66dc4959d95adba6f30c Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 8 Feb 2010 12:32:30 +0000 Subject: straighten naming scheme for application processor rom stage files. Apparently they are not used. If you have any of the boards touched in this commit, please test and report (so we can figure out what to do with the ap_romstage.c files in general) Signed-off-by: Stefan Reinauer Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc | 6 +- src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c | 126 +++++++++++++++++++++++ src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c | 126 ----------------------- src/mainboard/gigabyte/m57sli/Makefile.inc | 6 +- src/mainboard/gigabyte/m57sli/ap_romstage.c | 124 ++++++++++++++++++++++ src/mainboard/gigabyte/m57sli/apc_auto.c | 124 ---------------------- 6 files changed, 256 insertions(+), 256 deletions(-) create mode 100644 src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c delete mode 100644 src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c create mode 100644 src/mainboard/gigabyte/m57sli/ap_romstage.c delete mode 100644 src/mainboard/gigabyte/m57sli/apc_auto.c (limited to 'src/mainboard/gigabyte') diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc index 5baea40343..f595d4c539 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc +++ b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc @@ -26,7 +26,7 @@ obj-y += get_bus_conf.o obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o obj-$(CONFIG_USE_INIT) += romstage.o -obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o +obj-$(CONFIG_AP_CODE_IN_CAR) += ap_romstage.o # This is part of the conversion to init-obj and away from included code. initobj-y += crt0.o @@ -48,8 +48,8 @@ endif ifdef POST_EVALUATION -$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h - $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@ +$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@ diff --git a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c new file mode 100644 index 0000000000..452084f7c4 --- /dev/null +++ b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c @@ -0,0 +1,126 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu for AMD. + * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) + * Written by Morgan Tsai for SiS. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define ASSEMBLY 1 +#define __PRE_RAM__ + +#define RAMINIT_SYSINFO 1 +#define CACHE_AS_RAM_ADDRESS_DEBUG 0 + +#define SET_NB_CFG_54 1 + +//used by raminit +#define QRANK_DIMM_SUPPORT 1 + +#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 + +#include +#include +#include +#include +#include +#include +#include +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" +#include "pc80/serial.c" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" +#endif + +#include "arch/i386/lib/console.c" + +#if 0 +static void post_code(uint8_t value) { +#if 1 + int i; + for(i=0;i<0x80000;i++) { + outb(value, 0x80); + } +#endif +} +#endif + +#include +#include "northbridge/amd/amdk8/raminit.h" +#include "cpu/amd/model_fxx/apic_timer.c" + +#include "lib/delay.c" + +//#include "cpu/x86/lapic/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" + +#include "northbridge/amd/amdk8/debug.c" + +#include "southbridge/sis/sis966/sis966_early_ctrl.c" + +#include "northbridge/amd/amdk8/amdk8_f.h" + +#include "cpu/x86/mtrr.h" +#include "cpu/amd/mtrr.h" +#include "cpu/x86/tsc.h" + +#include "northbridge/amd/amdk8/amdk8_f_pci.c" +#include "northbridge/amd/amdk8/raminit_f_dqs.c" + +#include "cpu/amd/dualcore/dualcore.c" + +void hardwaremain(int ret_addr) +{ + struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE + struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM + + struct node_core_id id; + + id = get_node_core_id_x(); + + //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + + train_ram(id.nodeid, sysinfo, sysinfox); + + /* + go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp + */ + + __asm__ volatile ( + "movl %0, %%edi\n\t" + "jmp *%%edi\n\t" + :: "a"(ret_addr) + ); + + + +} + +#include + +void x86_exception(struct eregs *info) +{ + do { + hlt(); + } while(1); +} + + diff --git a/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c deleted file mode 100644 index 452084f7c4..0000000000 --- a/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * Written by Yinghai Lu for AMD. - * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) - * Written by Morgan Tsai for SiS. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define ASSEMBLY 1 -#define __PRE_RAM__ - -#define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 - -#define SET_NB_CFG_54 1 - -//used by raminit -#define QRANK_DIMM_SUPPORT 1 - -#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 - -#include -#include -#include -#include -#include -#include -#include -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" - -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - -#include "arch/i386/lib/console.c" - -#if 0 -static void post_code(uint8_t value) { -#if 1 - int i; - for(i=0;i<0x80000;i++) { - outb(value, 0x80); - } -#endif -} -#endif - -#include -#include "northbridge/amd/amdk8/raminit.h" -#include "cpu/amd/model_fxx/apic_timer.c" - -#include "lib/delay.c" - -//#include "cpu/x86/lapic/boot_cpu.c" -#include "northbridge/amd/amdk8/reset_test.c" - -#include "northbridge/amd/amdk8/debug.c" - -#include "southbridge/sis/sis966/sis966_early_ctrl.c" - -#include "northbridge/amd/amdk8/amdk8_f.h" - -#include "cpu/x86/mtrr.h" -#include "cpu/amd/mtrr.h" -#include "cpu/x86/tsc.h" - -#include "northbridge/amd/amdk8/amdk8_f_pci.c" -#include "northbridge/amd/amdk8/raminit_f_dqs.c" - -#include "cpu/amd/dualcore/dualcore.c" - -void hardwaremain(int ret_addr) -{ - struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE - struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM - - struct node_core_id id; - - id = get_node_core_id_x(); - - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); - - train_ram(id.nodeid, sysinfo, sysinfox); - - /* - go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp - */ - - __asm__ volatile ( - "movl %0, %%edi\n\t" - "jmp *%%edi\n\t" - :: "a"(ret_addr) - ); - - - -} - -#include - -void x86_exception(struct eregs *info) -{ - do { - hlt(); - } while(1); -} - - diff --git a/src/mainboard/gigabyte/m57sli/Makefile.inc b/src/mainboard/gigabyte/m57sli/Makefile.inc index 0fb2cac3d4..45b19b5d0f 100644 --- a/src/mainboard/gigabyte/m57sli/Makefile.inc +++ b/src/mainboard/gigabyte/m57sli/Makefile.inc @@ -26,7 +26,7 @@ obj-y += get_bus_conf.o obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o obj-$(CONFIG_USE_INIT) += romstage.o -obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o +obj-$(CONFIG_AP_CODE_IN_CAR) += ap_romstage.o obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.o obj-$(CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL) += fanctl.o @@ -60,8 +60,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@ -$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h - $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@ +$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@ diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c new file mode 100644 index 0000000000..007dfa9a95 --- /dev/null +++ b/src/mainboard/gigabyte/m57sli/ap_romstage.c @@ -0,0 +1,124 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 AMD + * Written by Yinghai Lu for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define ASSEMBLY 1 +#define __PRE_RAM__ + +#define RAMINIT_SYSINFO 1 +#define CACHE_AS_RAM_ADDRESS_DEBUG 0 + +#define SET_NB_CFG_54 1 + +//used by raminit +#define QRANK_DIMM_SUPPORT 1 + +#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 + +#include +#include +#include +#include +#include +#include +#include +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" +#include "pc80/serial.c" + +#if CONFIG_USE_INIT == 0 + #include "lib/memcpy.c" +#endif + +#include "arch/i386/lib/console.c" + +#if 0 +static void post_code(uint8_t value) { +#if 1 + int i; + for(i=0;i<0x80000;i++) { + outb(value, 0x80); + } +#endif +} +#endif + +#include +#include "northbridge/amd/amdk8/raminit.h" +#include "cpu/amd/model_fxx/apic_timer.c" + +#include "lib/delay.c" + +//#include "cpu/x86/lapic/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" + +#include "northbridge/amd/amdk8/debug.c" + +#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" + +#include "northbridge/amd/amdk8/amdk8_f.h" + +#include "cpu/x86/mtrr.h" +#include "cpu/amd/mtrr.h" +#include "cpu/x86/tsc.h" + +#include "northbridge/amd/amdk8/amdk8_f_pci.c" +#include "northbridge/amd/amdk8/raminit_f_dqs.c" + +#include "cpu/amd/dualcore/dualcore.c" + +void hardwaremain(int ret_addr) +{ + struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE + struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM + + struct node_core_id id; + + id = get_node_core_id_x(); + + //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + + train_ram(id.nodeid, sysinfo, sysinfox); + + /* + go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp + */ + + __asm__ volatile ( + "movl %0, %%edi\n\t" + "jmp *%%edi\n\t" + :: "a"(ret_addr) + ); + + + +} + +#include + +void x86_exception(struct eregs *info) +{ + do { + hlt(); + } while(1); +} + + diff --git a/src/mainboard/gigabyte/m57sli/apc_auto.c b/src/mainboard/gigabyte/m57sli/apc_auto.c deleted file mode 100644 index 007dfa9a95..0000000000 --- a/src/mainboard/gigabyte/m57sli/apc_auto.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * Written by Yinghai Lu for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define ASSEMBLY 1 -#define __PRE_RAM__ - -#define RAMINIT_SYSINFO 1 -#define CACHE_AS_RAM_ADDRESS_DEBUG 0 - -#define SET_NB_CFG_54 1 - -//used by raminit -#define QRANK_DIMM_SUPPORT 1 - -#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 - -#include -#include -#include -#include -#include -#include -#include -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" - -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - -#include "arch/i386/lib/console.c" - -#if 0 -static void post_code(uint8_t value) { -#if 1 - int i; - for(i=0;i<0x80000;i++) { - outb(value, 0x80); - } -#endif -} -#endif - -#include -#include "northbridge/amd/amdk8/raminit.h" -#include "cpu/amd/model_fxx/apic_timer.c" - -#include "lib/delay.c" - -//#include "cpu/x86/lapic/boot_cpu.c" -#include "northbridge/amd/amdk8/reset_test.c" - -#include "northbridge/amd/amdk8/debug.c" - -#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c" - -#include "northbridge/amd/amdk8/amdk8_f.h" - -#include "cpu/x86/mtrr.h" -#include "cpu/amd/mtrr.h" -#include "cpu/x86/tsc.h" - -#include "northbridge/amd/amdk8/amdk8_f_pci.c" -#include "northbridge/amd/amdk8/raminit_f_dqs.c" - -#include "cpu/amd/dualcore/dualcore.c" - -void hardwaremain(int ret_addr) -{ - struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in CACHE - struct sys_info *sysinfox = ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); // in RAM - - struct node_core_id id; - - id = get_node_core_id_x(); - - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); - - train_ram(id.nodeid, sysinfo, sysinfox); - - /* - go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp - */ - - __asm__ volatile ( - "movl %0, %%edi\n\t" - "jmp *%%edi\n\t" - :: "a"(ret_addr) - ); - - - -} - -#include - -void x86_exception(struct eregs *info) -{ - do { - hlt(); - } while(1); -} - - -- cgit v1.2.3