From f6e37316d0f751844898e92745182be9104d7df2 Mon Sep 17 00:00:00 2001 From: Wang Qing Pei Date: Tue, 9 Nov 2010 09:09:47 +0100 Subject: Disable dev3 on ma78gm-us2h Disable bus 0 dev 3 PCI bridge, ma78gm-us2h does not have this slot. Change-Id: Ia355ee385fd0f37793b4bdf1815c033670823eaa Signed-off-by: Wang Qing Pei Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/187 Tested-by: build bot (Jenkins) --- src/mainboard/gigabyte/ma78gm/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/gigabyte/ma78gm/devicetree.cb') diff --git a/src/mainboard/gigabyte/ma78gm/devicetree.cb b/src/mainboard/gigabyte/ma78gm/devicetree.cb index 1aa859f8a3..2fb4824c56 100644 --- a/src/mainboard/gigabyte/ma78gm/devicetree.cb +++ b/src/mainboard/gigabyte/ma78gm/devicetree.cb @@ -13,7 +13,7 @@ chip northbridge/amd/amdfam10/root_complex device pci 0.0 on end # HT 0x9600 device pci 1.0 on end # Internal Graphics P2P bridge 0x9602 device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603 - device pci 3.0 on end # PCIE P2P bridge 0x960b + device pci 3.0 off end # PCIE P2P bridge 0x960b device pci 4.0 on end # PCIE P2P bridge 0x9604 device pci 5.0 off end # PCIE P2P bridge 0x9605 device pci 6.0 off end # PCIE P2P bridge 0x9606 -- cgit v1.2.3