From d502dc092a26726472fc5871c77ebff192be4cb8 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 27 Dec 2016 01:08:02 +0100 Subject: mb/ga-m57sli-s4: Fix early uart output MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The console output is garbled until it is fixed in ramstage by devicetree which sets the uart clock predivider correctly. Change-Id: I6d6ec0febfec98a8d4a71e1476036c804cf5f08d Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/17969 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/gigabyte/m57sli/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/gigabyte/m57sli') diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index d42ccc7570..5c426ef56b 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -143,7 +143,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE); pnp_exit_ext_func_mode(SERIAL_DEV); #endif - ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48); + ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); setup_mb_resource_map(); -- cgit v1.2.3