From 7e00a44b773ba16b72fa1ca69825407be0c98ad5 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 25 May 2010 17:09:05 +0000 Subject: also rename the config option. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/gigabyte/m57sli/ap_romstage.c | 2 +- src/mainboard/gigabyte/m57sli/romstage.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/gigabyte/m57sli') diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c index 8429286bc7..61ca908248 100644 --- a/src/mainboard/gigabyte/m57sli/ap_romstage.c +++ b/src/mainboard/gigabyte/m57sli/ap_romstage.c @@ -81,7 +81,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); - //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP + //FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index d7a7a3bb4c..18c6e9280e 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -52,7 +52,7 @@ #include "pc80/mc146818rtc_early.c" #include -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" #include "pc80/usbdebug_serial.c" #endif @@ -212,7 +212,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Halt if there was a built in self test failure */ report_bist_failure(bist); -#if CONFIG_USBDEBUG_DIRECT +#if CONFIG_USBDEBUG mcp55_enable_usbdebug(DBGP_DEFAULT); early_usbdebug_init(); #endif -- cgit v1.2.3