From 991ee05de9fedc15f178660e0cac0b46e783525e Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 21 Mar 2020 22:34:44 +0100 Subject: mb/gigabyte/ga-h61m-s2pv: rename to ga-h61m-series It is not a single mainboard anymore, it's actually three variants. Change-Id: I66f1239abadd8bf93269d6d4617329dc4b925e8d Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/39743 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- .../gigabyte/ga-h61m-series/devicetree.cb | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 src/mainboard/gigabyte/ga-h61m-series/devicetree.cb (limited to 'src/mainboard/gigabyte/ga-h61m-series/devicetree.cb') diff --git a/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb new file mode 100644 index 0000000000..14778097e6 --- /dev/null +++ b/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb @@ -0,0 +1,46 @@ +## SPDX-License-Identifier: GPL-2.0-only +## This file is part of the coreboot project. + +chip northbridge/intel/sandybridge + device cpu_cluster 0 on + chip cpu/intel/model_206ax + register "c1_acpower" = "1" + register "c1_battery" = "1" + register "c2_acpower" = "3" + register "c2_battery" = "3" + register "c3_acpower" = "5" + register "c3_battery" = "5" + device lapic 0 on end + device lapic 0xacac off end + end + end + register "pci_mmio_size" = "2048" + device domain 0 on + subsystemid 0x1458 0x5000 inherit + + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PEG + device pci 02.0 on end # iGPU + + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "c2_latency" = "0x0065" + register "gen1_dec" = "0x003c0a01" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x33" + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + + device pci 16.0 on end # MEI #1 + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # HD Audio + + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on end # LPC bridge + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 on end # Thermal + end + end +end -- cgit v1.2.3