From b9d2589ca40026b543ecb5b008ce0d1bc346bf53 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 15 Jun 2018 22:02:28 +0200 Subject: mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 On some boards the devicetree and Function Disable register did not match. In this case the FD values are put in the devicetree as these were the values that were actually used in practice. A complete devicetree will make it easier to automatically disable devices in ramstage. Change-Id: I1692ca5f490ea84e2fc520d3f66044ad7514f76e Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/27122 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/mainboard/gigabyte/ga-g41m-es2l') diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb index d9483980d8..9f92d2adf5 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb +++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb @@ -62,7 +62,9 @@ chip northbridge/intel/x4x # Northbridge end end device pci 1c.2 on end # PCIe 3 - device pci 1c.3 on end # PCIe 4 + device pci 1c.3 off end # PCIe 4 + device pci 1c.4 off end # PCIe 5 + device pci 1c.5 off end # PCIe 6 device pci 1d.0 on # USB subsystemid 0x1458 0x5004 end @@ -79,6 +81,8 @@ chip northbridge/intel/x4x # Northbridge subsystemid 0x1458 0x5006 end device pci 1e.0 on end # PCI bridge + device pci 1e.2 off end # AC'97 Audio + device pci 1e.3 off end # AC'97 Modem device pci 1f.0 on # ISA bridge subsystemid 0x1458 0x5001 chip superio/ite/it8718f # Super I/O @@ -164,9 +168,6 @@ chip northbridge/intel/x4x # Northbridge device pci 1f.3 on # SMbus subsystemid 0x1458 0x5001 end - device pci 1f.4 off end - device pci 1f.5 off end - device pci 1f.6 off end end end end -- cgit v1.2.3