From 12d681b23f4c1e24cb31f5f253ec42290ca9c5ee Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 14 Jun 2014 18:51:34 +0300 Subject: intel/i945 gm45: Use acpi_s3_resume_allowed() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I7811ee695f35c708144c4af5d43935deb22dd4df Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6061 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan Reviewed-by: Marc Jones --- src/mainboard/getac/p470/romstage.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'src/mainboard/getac') diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index a081a8a8a2..0f746e1b75 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -304,17 +305,16 @@ void main(unsigned long bist) reg32 = inl(DEFAULT_PMBASE + 0x04); printk(BIOS_DEBUG, "PM1_CNT: %08x\n", reg32); if (((reg32 >> 10) & 7) == 5) { -#if CONFIG_HAVE_ACPI_RESUME - printk(BIOS_DEBUG, "Resume from S3 detected.\n"); - boot_mode = 2; - /* Clear SLP_TYPE. This will break stage2 but - * we care for that when we get there. - */ - outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04); - -#else - printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n"); -#endif + if (acpi_s3_resume_allowed()) { + printk(BIOS_DEBUG, "Resume from S3 detected.\n"); + boot_mode = 2; + /* Clear SLP_TYPE. This will break stage2 but + * we care for that when we get there. + */ + outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04); + } else { + printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n"); + } } /* Enable SPD ROMs and DDR-II DRAM */ -- cgit v1.2.3