From bd74aaf534e46a38e50a2db03df58b28cae8ed96 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 16 Mar 2019 19:56:40 +0200 Subject: mb/foxconn/g41m: Fix overridetree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .chip_info field of PNP devices in overridetree incorrectly pointed to southbridge config structure in generated static.c files. Change-Id: If507c8ea9c865ff86e127226b93a8579bcf39d8d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31935 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons --- src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'src/mainboard/foxconn/g41s-k') diff --git a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb index 45ae89730e..96e11e3d5e 100644 --- a/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb +++ b/src/mainboard/foxconn/g41s-k/variants/g41m/overridetree.cb @@ -3,13 +3,15 @@ chip northbridge/intel/x4x # Northbridge subsystemid 0x105b 0x0dc0 inherit chip southbridge/intel/i82801gx # Southbridge device pci 1f.0 on # ISA bridge - device pnp 2e.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 + chip superio/ite/it8720f # Super I/O + device pnp 2e.0 on # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.2 off end # COM2 (IR) + device pnp 2e.a off end # CIR end - device pnp 2e.2 off end # COM2 (IR) - device pnp 2e.a off end # CIR end device pci 1f.1 on end # PATA/IDE end -- cgit v1.2.3