From df7de392ef5f8e1654df96a1a050820eb3779012 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 23 Jun 2024 04:59:03 +0200 Subject: skl mainboards/dt: Move SATA related settings into SATA device scope MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I50706d7a077767d2295d6d5f209c30109d607277 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/83179 Reviewed-by: Eric Lai Reviewed-by: Erik van den Bogaert Reviewed-by: Marvin Evers Reviewed-by: Jonathon Hall Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/mainboard/facebook/monolith/devicetree.cb | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'src/mainboard/facebook') diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 854b887fb0..c41a26f1cf 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -32,11 +32,6 @@ chip soc/intel/skylake register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" - register "SataSalpSupport" = "1" - register "SataPortsEnable" = "{ - [0] = 1, - }" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "2" @@ -209,7 +204,10 @@ chip soc/intel/skylake device ref south_xdci on end device ref thermal on end device ref heci1 on end - device ref sata on end + device ref sata on + register "SataSalpSupport" = "1" + register "SataPortsEnable[0]" = "1" + end device ref pcie_rp3 on end # x1 baseboard WWAN device ref pcie_rp6 on end # x1 baseboard i210 device ref pcie_rp9 on end # x4 FPGA -- cgit v1.2.3