From 8d5b6747391919a8de05dd19308acc79f2b22659 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 27 Sep 2021 13:04:28 +0200 Subject: soc/intel/braswell: Set GNVS DPTE via devicetree Introduce the `dptf_enable` devicetree setting to set the DPTE GNVS field, as newer Intel platforms do. Change-Id: I88b746c64ca57604f946eefb00a70487a2fb27c0 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/57988 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks Reviewed-by: Matt DeVillier --- src/mainboard/facebook/fbg1701/acpi_tables.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/mainboard/facebook') diff --git a/src/mainboard/facebook/fbg1701/acpi_tables.c b/src/mainboard/facebook/fbg1701/acpi_tables.c index 226da413fc..3576455335 100644 --- a/src/mainboard/facebook/fbg1701/acpi_tables.c +++ b/src/mainboard/facebook/fbg1701/acpi_tables.c @@ -15,9 +15,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - /* Disable DPTF */ - gnvs->dpte = 0; - /* PMIC is configured in I2C1, hide it for the OS */ struct device_nvs *dev_nvs = acpi_get_device_nvs(); dev_nvs->lpss_en[LPSS_NVS_I2C2] = 0; -- cgit v1.2.3