From b8c2aa2ce8fb74bd8bf3407e0a20240c7f41eadf Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 7 Feb 2008 20:37:37 +0000 Subject: Change references to qemu in Coreboot-v2 calls to qemu-x86. The patch was followed by these svn commands: svn mv targets/emulation/qemu-i386/ targets/emulation/qemu-x86 svn mv --force targets/emulation/qemu-i386/ targets/emulation/qemu-x86 svn mv --force src/mainboard/emulation/qemu-i386/ src/mainboard/emulation/qemu-x86 svn mv --force src/cpu/emulation/qemu-i386/ src/cpu/emulation/qemu-x86 Signed-off-by: Myles Watson Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/emulation/qemu-i386/Config.lb | 114 ---- src/mainboard/emulation/qemu-i386/Options.lb | 118 ---- src/mainboard/emulation/qemu-i386/auto.c | 38 -- src/mainboard/emulation/qemu-i386/chip.h | 4 - src/mainboard/emulation/qemu-i386/cmos.layout | 74 --- src/mainboard/emulation/qemu-i386/debug.c | 128 ---- src/mainboard/emulation/qemu-i386/failover.c | 29 - src/mainboard/emulation/qemu-i386/irq_tables.c | 35 -- src/mainboard/emulation/qemu-i386/mainboard.c | 39 -- src/mainboard/emulation/qemu-i386/vgabios.c | 838 ------------------------- src/mainboard/emulation/qemu-x86/Config.lb | 114 ++++ src/mainboard/emulation/qemu-x86/Options.lb | 118 ++++ src/mainboard/emulation/qemu-x86/auto.c | 38 ++ src/mainboard/emulation/qemu-x86/chip.h | 4 + src/mainboard/emulation/qemu-x86/cmos.layout | 74 +++ src/mainboard/emulation/qemu-x86/debug.c | 128 ++++ src/mainboard/emulation/qemu-x86/failover.c | 29 + src/mainboard/emulation/qemu-x86/irq_tables.c | 35 ++ src/mainboard/emulation/qemu-x86/mainboard.c | 39 ++ src/mainboard/emulation/qemu-x86/vgabios.c | 838 +++++++++++++++++++++++++ 20 files changed, 1417 insertions(+), 1417 deletions(-) delete mode 100644 src/mainboard/emulation/qemu-i386/Config.lb delete mode 100644 src/mainboard/emulation/qemu-i386/Options.lb delete mode 100644 src/mainboard/emulation/qemu-i386/auto.c delete mode 100644 src/mainboard/emulation/qemu-i386/chip.h delete mode 100644 src/mainboard/emulation/qemu-i386/cmos.layout delete mode 100644 src/mainboard/emulation/qemu-i386/debug.c delete mode 100644 src/mainboard/emulation/qemu-i386/failover.c delete mode 100644 src/mainboard/emulation/qemu-i386/irq_tables.c delete mode 100644 src/mainboard/emulation/qemu-i386/mainboard.c delete mode 100644 src/mainboard/emulation/qemu-i386/vgabios.c create mode 100644 src/mainboard/emulation/qemu-x86/Config.lb create mode 100644 src/mainboard/emulation/qemu-x86/Options.lb create mode 100644 src/mainboard/emulation/qemu-x86/auto.c create mode 100644 src/mainboard/emulation/qemu-x86/chip.h create mode 100644 src/mainboard/emulation/qemu-x86/cmos.layout create mode 100644 src/mainboard/emulation/qemu-x86/debug.c create mode 100644 src/mainboard/emulation/qemu-x86/failover.c create mode 100644 src/mainboard/emulation/qemu-x86/irq_tables.c create mode 100644 src/mainboard/emulation/qemu-x86/mainboard.c create mode 100644 src/mainboard/emulation/qemu-x86/vgabios.c (limited to 'src/mainboard/emulation') diff --git a/src/mainboard/emulation/qemu-i386/Config.lb b/src/mainboard/emulation/qemu-i386/Config.lb deleted file mode 100644 index b2a009d2e5..0000000000 --- a/src/mainboard/emulation/qemu-i386/Config.lb +++ /dev/null @@ -1,114 +0,0 @@ -## -## Compute the location and size of where this firmware image -## (coreboot plus bootloader) will live in the boot rom chip. -## -default ROM_SIZE = 256 * 1024 -default ROM_SECTION_SIZE = ROM_SIZE -default ROM_SECTION_OFFSET = 0 - -## -## Compute the start location and size size of -## The coreboot bootloader. -## -default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) -default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) - -## -## Compute where this copy of coreboot will start in the boot rom -## -default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) - -## -## Compute a range of ROM that can cached to speed up coreboot, -## execution speed. -## -## XIP_ROM_SIZE must be a power of 2. -## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE -## -default XIP_ROM_SIZE=32*1024 -default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) - -## -## Set all of the defaults for an x86 architecture -## - -arch i386 end - -## -## Build the objects we have code for in this directory. -## - -driver mainboard.o -object vgabios.o -if HAVE_PIRQ_TABLE object irq_tables.o end -#object reset.o - -## -## Romcc output -## -makerule ./failover.E - depends "$(MAINBOARD)/failover.c ./romcc" - action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" -end - -makerule ./failover.inc - depends "$(MAINBOARD)/failover.c ./romcc" - action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" -end - -makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h ./romcc" - action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" -end -makerule ./auto.inc - depends "$(MAINBOARD)/auto.c option_table.h ./romcc" - action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" -end - -## -## Build our 16 bit and 32 bit coreboot entry code -## -mainboardinit cpu/x86/16bit/entry16.inc -mainboardinit cpu/x86/32bit/entry32.inc -ldscript /cpu/x86/16bit/entry16.lds -ldscript /cpu/x86/32bit/entry32.lds - -## -## Build our reset vector (This is where coreboot is entered) -## -mainboardinit cpu/x86/16bit/reset16.inc -ldscript /cpu/x86/16bit/reset16.lds - -### Should this be in the northbridge code? -mainboardinit arch/i386/lib/cpu_reset.inc - -## -## Include an id string (For safe flashing) -## -mainboardinit arch/i386/lib/id.inc -ldscript /arch/i386/lib/id.lds - -### -### O.k. We aren't just an intermediary anymore! -### - -## -## Setup RAM -## -mainboardinit cpu/x86/fpu/enable_fpu.inc -mainboardinit ./auto.inc - -## -## Include the secondary Configuration files -## -dir /pc80 -config chip.h - -chip cpu/emulation/qemu-i386 - device pci_domain 0 on - device pci 0.0 on end - device pci 1.0 on end -# register "com1" = "{1}" -# register "com1" = "{1, 0, 0x3f8, 4}" - end -end diff --git a/src/mainboard/emulation/qemu-i386/Options.lb b/src/mainboard/emulation/qemu-i386/Options.lb deleted file mode 100644 index 74e543f737..0000000000 --- a/src/mainboard/emulation/qemu-i386/Options.lb +++ /dev/null @@ -1,118 +0,0 @@ -uses HAVE_MP_TABLE -uses HAVE_PIRQ_TABLE -uses USE_FALLBACK_IMAGE -uses HAVE_FALLBACK_BOOT -uses HAVE_HARD_RESET -uses HAVE_OPTION_TABLE -uses USE_OPTION_TABLE -uses CONFIG_COMPRESS -uses CONFIG_COMPRESSED_PAYLOAD_NRV2B -uses CONFIG_COMPRESSED_PAYLOAD_LZMA -uses CONFIG_PRECOMPRESSED_PAYLOAD -uses CONFIG_ROM_PAYLOAD -uses IRQ_SLOT_COUNT -uses MAINBOARD -uses MAINBOARD_VENDOR -uses MAINBOARD_PART_NUMBER -uses COREBOOT_EXTRA_VERSION -uses ARCH -uses FALLBACK_SIZE -uses STACK_SIZE -uses HEAP_SIZE -uses ROM_SIZE -uses ROM_SECTION_SIZE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET -uses CONFIG_ROM_PAYLOAD_START -uses PAYLOAD_SIZE -uses _ROMBASE -uses _RAMBASE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE -uses HAVE_MP_TABLE -uses CROSS_COMPILE -uses CC -uses HOSTCC -uses OBJCOPY - -uses CONFIG_CONSOLE_SERIAL8250 - - -uses DEFAULT_CONSOLE_LOGLEVEL -uses MAXIMUM_CONSOLE_LOGLEVEL - -default CONFIG_CONSOLE_SERIAL8250=1 -default DEFAULT_CONSOLE_LOGLEVEL=8 -default MAXIMUM_CONSOLE_LOGLEVEL=8 -## ROM_SIZE is the size of boot ROM that this board will use. -default ROM_SIZE = 256*1024 - -### -### Build options -### - -## -## Build code for the fallback boot -## -default HAVE_FALLBACK_BOOT=1 - -## -## no MP table -## -default HAVE_MP_TABLE=0 - -## -## Build code to reset the motherboard from coreboot -## -default HAVE_HARD_RESET=0 - -## -## Build code to export a programmable irq routing table -## -default HAVE_PIRQ_TABLE=0 -default IRQ_SLOT_COUNT=5 -#object irq_tables.o - -## -## Build code to export a CMOS option table -## -default HAVE_OPTION_TABLE=1 - -### -### coreboot layout values -### - -## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default ROM_IMAGE_SIZE = 65536 -default FALLBACK_SIZE = 131072 - -## -## Use a small 8K stack -## -default STACK_SIZE=0x2000 - -## -## Use a small 16K heap -## -default HEAP_SIZE=0x4000 - -## -## Only use the option table in a normal image -## -#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE -default USE_OPTION_TABLE = 0 - -default _RAMBASE = 0x00004000 - -default CONFIG_ROM_PAYLOAD = 1 - -## -## The default compiler -## -default CC="$(CROSS_COMPILE)gcc -m32" -default HOSTCC="gcc" - -end - - diff --git a/src/mainboard/emulation/qemu-i386/auto.c b/src/mainboard/emulation/qemu-i386/auto.c deleted file mode 100644 index d2fa623d68..0000000000 --- a/src/mainboard/emulation/qemu-i386/auto.c +++ /dev/null @@ -1,38 +0,0 @@ -#define ASSEMBLY 1 - -#include -#include -#include -#include -#include -#include -#include -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "arch/i386/lib/console.c" - -/* - */ -void udelay(int usecs) -{ - int i; - for(i = 0; i < usecs; i++) - outb(i&0xff, 0x80); -} - -#include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" -#include "debug.c" - -static void main(void) -{ - /* init_timer();*/ - outb(5, 0x80); - - uart_init(); - console_init(); - - //print_pci_devices(); - //dump_pci_devices(); -} diff --git a/src/mainboard/emulation/qemu-i386/chip.h b/src/mainboard/emulation/qemu-i386/chip.h deleted file mode 100644 index 3aae25c769..0000000000 --- a/src/mainboard/emulation/qemu-i386/chip.h +++ /dev/null @@ -1,4 +0,0 @@ -extern struct chip_operations mainboard_emulation_qemu_i386_ops; - -struct mainboard_emulation_qemu_i386_config { -}; diff --git a/src/mainboard/emulation/qemu-i386/cmos.layout b/src/mainboard/emulation/qemu-i386/cmos.layout deleted file mode 100644 index 5ba4c032c1..0000000000 --- a/src/mainboard/emulation/qemu-i386/cmos.layout +++ /dev/null @@ -1,74 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 1007 1008 - - diff --git a/src/mainboard/emulation/qemu-i386/debug.c b/src/mainboard/emulation/qemu-i386/debug.c deleted file mode 100644 index 714fcc5783..0000000000 --- a/src/mainboard/emulation/qemu-i386/debug.c +++ /dev/null @@ -1,128 +0,0 @@ - -static void print_debug_pci_dev(unsigned dev) -{ - print_debug("PCI: "); - print_debug_hex8((dev >> 16) & 0xff); - print_debug_char(':'); - print_debug_hex8((dev >> 11) & 0x1f); - print_debug_char('.'); - print_debug_hex8((dev >> 8) & 7); -} - -static void print_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - print_debug_pci_dev(dev); - print_debug("\r\n"); - } -} - -static void dump_pci_device(unsigned dev) -{ - int i; - print_debug_pci_dev(dev); - print_debug("\r\n"); - - for(i = 0; i <= 255; i++) { - unsigned char val; - if ((i & 0x0f) == 0) { - print_debug_hex8(i); - print_debug_char(':'); - } - val = pci_read_config8(dev, i); - print_debug_char(' '); - print_debug_hex8(val); - if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); - } - } -} - -static void dump_pci_devices(void) -{ - device_t dev; - for(dev = PCI_DEV(0, 0, 0); - dev <= PCI_DEV(0, 0x1f, 0x7); - dev += PCI_DEV(0,0,1)) { - uint32_t id; - id = pci_read_config32(dev, PCI_VENDOR_ID); - if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0xffff) || - (((id >> 16) & 0xffff) == 0x0000)) { - continue; - } - dump_pci_device(dev); - } -} -#if 0 -static void dump_spd_registers(const struct mem_controller *ctrl) -{ - int i; - print_debug("\r\n"); - for(i = 0; i < 4; i++) { - unsigned device; - device = ctrl->channel0[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".0: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - device = ctrl->channel1[i]; - if (device) { - int j; - print_debug("dimm: "); - print_debug_hex8(i); - print_debug(".1: "); - print_debug_hex8(device); - for(j = 0; j < 256; j++) { - int status; - unsigned char byte; - if ((j & 0xf) == 0) { - print_debug("\r\n"); - print_debug_hex8(j); - print_debug(": "); - } - status = smbus_read_byte(device, j); - if (status < 0) { - print_debug("bad device\r\n"); - break; - } - byte = status & 0xff; - print_debug_hex8(byte); - print_debug_char(' '); - } - print_debug("\r\n"); - } - } -} -#endif diff --git a/src/mainboard/emulation/qemu-i386/failover.c b/src/mainboard/emulation/qemu-i386/failover.c deleted file mode 100644 index 10bb2f48c1..0000000000 --- a/src/mainboard/emulation/qemu-i386/failover.c +++ /dev/null @@ -1,29 +0,0 @@ -#define ASSEMBLY 1 -#include -#include -#include -#include -#include "arch/romcc_io.h" -#include "pc80/mc146818rtc_early.c" -#include "cpu/x86/lapic/boot_cpu.c" - -static void main(void) -{ - /* for now, just always assume failure */ - -#if 0 - /* Is this a cpu reset? */ - if (cpu_init_detected()) { - if (last_boot_normal()) { - asm("jmp __normal_image"); - } else { - asm("jmp __cpu_reset"); - } - } - - /* This is the primary cpu how should I boot? */ - else if (do_normal_boot()) { - asm("jmp __normal_image"); - } -#endif -} diff --git a/src/mainboard/emulation/qemu-i386/irq_tables.c b/src/mainboard/emulation/qemu-i386/irq_tables.c deleted file mode 100644 index d75eaa4639..0000000000 --- a/src/mainboard/emulation/qemu-i386/irq_tables.c +++ /dev/null @@ -1,35 +0,0 @@ -/* This file was generated by getpir.c, do not modify! - (but if you do, please run checkpir on it to verify) - * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up - * - * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM -*/ - -#include - -const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*6, /* there can be total 6 devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x01<<3)|0x0, /* Where the interrupt router lies (dev) */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x8086, /* Vendor */ - 0x7000, /* Device */ - 0, /* Crap (miniport) */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x7, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ - { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x01<<3)|0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x02<<3)|0x0, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0x0def8}}, 0x1, 0x0}, - {0x00,(0x03<<3)|0x0, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0x0def8}}, 0x2, 0x0}, - {0x00,(0x04<<3)|0x0, {{0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0x0def8}}, 0x3, 0x0}, - {0x00,(0x05<<3)|0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0x0def8}}, 0x4, 0x0}, - {0x00,(0x06<<3)|0x0, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0x0def8}}, 0x5, 0x0}, - } -}; -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr); -} diff --git a/src/mainboard/emulation/qemu-i386/mainboard.c b/src/mainboard/emulation/qemu-i386/mainboard.c deleted file mode 100644 index cfbc0b2246..0000000000 --- a/src/mainboard/emulation/qemu-i386/mainboard.c +++ /dev/null @@ -1,39 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include "chip.h" - -void vga_enable_console(); - -static void vga_init(device_t dev) -{ - /* code to make vga init run in real mode - does work but against the current coreboot philosophy */ - printk_debug("INSTALL REAL-MODE IDT\n"); - setup_realmode_idt(); - printk_debug("DO THE VGA BIOS\n"); - do_vgabios(); - - vga_enable_console(); -} - -static struct device_operations vga_operations = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = vga_init, - .ops_pci = 0, -}; - -static const struct pci_driver vga_driver __pci_driver = { - .ops = &vga_operations, - .vendor = 0x1013, - .device = 0x00b8, -}; - -struct chip_operations mainboard_emulation_qemu_i386_ops = { - CHIP_NAME("QEMU Mainboard") -}; - diff --git a/src/mainboard/emulation/qemu-i386/vgabios.c b/src/mainboard/emulation/qemu-i386/vgabios.c deleted file mode 100644 index 7f42f0ab12..0000000000 --- a/src/mainboard/emulation/qemu-i386/vgabios.c +++ /dev/null @@ -1,838 +0,0 @@ -#include -#include -#include -#include -#undef __KERNEL__ -#include -#include - -/* vgabios.c. Derived from: */ - -/*------------------------------------------------------------ -*- C -*- - * 2 Kernel Monte a.k.a. Linux loading Linux on x86 - * - * Erik Arjan Hendriks - * - * This version is a derivative of the original two kernel monte - * which is (C) 2000 Scyld. - * - * Copyright (C) 2000 Scyld Computing Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Portions related to the alpha architecture are: - * - * Copyright(C) 2001 University of California. LA-CC Number 01-67. - * This software has been authored by an employee or employees of the - * University of California, operator of the Los Alamos National - * Laboratory under Contract No. W-7405-ENG-36 with the U.S. - * Department of Energy. The U.S. Government has rights to use, - * reproduce, and distribute this software. If the software is - * modified to produce derivative works, such modified software should - * be clearly marked, so as not to confuse it with the version - * available from LANL. - * - * This software may be used and distributed according to the terms - * of the GNU General Public License, incorporated herein by - * reference to http://www.gnu.org/licenses/gpl.html. - * - * This software is provided by the author(s) "as is" and any express - * or implied warranties, including, but not limited to, the implied - * warranties of merchantability and fitness for a particular purpose - * are disclaimed. In no event shall the author(s) be liable for any - * direct, indirect, incidental, special, exemplary, or consequential - * damages (including, but not limited to, procurement of substitute - * goods or services; loss of use, data, or profits; or business - * interruption) however caused and on any theory of liability, - * whether in contract, strict liability, or tort (including - * negligence or otherwise) arising in any way out of the use of this - * software, even if advised of the possibility of such damage. - * - * $Id: vgabios.c,v 1.5 2004/10/06 17:33:52 rminnich Exp $ - *--------------------------------------------------------------------*/ - -/* Modified to be a self sufficient plug in so that it can be used - without reliance on other parts of core coreboot - (C) 2005 Nick.Barker9@btinternet.com - - Used initially for epia-m where there are problems getting the bios - emulator to successfully run this bios. -*/ - -/* Declare a temporary global descriptor table - necessary because the - Core part of the bios no longer sets up any 16 bit segments */ -__asm__ ( - /* pointer to original gdt */ - "gdtarg: \n" - " .word gdt_limit \n" - " .long gdt \n" - - /* compute the table limit */ - "__mygdt_limit = __mygdt_end - __mygdt - 1 \n" - - "__mygdtaddr: \n" - " .word __mygdt_limit \n" - " .long __mygdt \n" - - "__mygdt: \n" - /* selgdt 0, unused */ - " .word 0x0000, 0x0000 \n" - " .byte 0x00, 0x00, 0x00, 0x00 \n" - - /* selgdt 8, unused */ - " .word 0x0000, 0x0000 \n" - " .byte 0x00, 0x00, 0x00, 0x00 \n" - - /* selgdt 0x10, flat code segment */ - " .word 0xffff, 0x0000 \n" - " .byte 0x00, 0x9b, 0xcf, 0x00 \n" - - /* selgdt 0x18, flat data segment */ - " .word 0xffff, 0x0000 \n" - " .byte 0x00, 0x93, 0xcf, 0x00 \n" - - /* selgdt 0x20, unused */ - " .word 0x0000, 0x0000 \n" - " .byte 0x00, 0x00, 0x00, 0x00 \n" - - /* selgdt 0x28 16-bit 64k code at 0x00000000 */ - " .word 0xffff, 0x0000 \n" - " .byte 0, 0x9a, 0, 0 \n" - - /* selgdt 0x30 16-bit 64k data at 0x00000000 */ - " .word 0xffff, 0x0000 \n" - " .byte 0, 0x92, 0, 0 \n" - - "__mygdt_end: \n" -); - -/* Declare a pointer to where our idt is going to be i.e. at mem zero */ -__asm__ ("__myidt: \n" - /* 16-bit limit */ - " .word 1023 \n" - /* 24-bit base */ - " .long 0 \n" - " .word 0 \n" -); - -/* The address arguments to this function are PHYSICAL ADDRESSES */ -static void real_mode_switch_call_vga(unsigned long devfn) -{ - __asm__ __volatile__ ( - // paranoia -- does ecx get saved? not sure. This is - // the easiest safe thing to do. - " pushal \n" - /* save the stack */ - " mov %esp, __stack \n" - " jmp 1f \n" - "__stack: .long 0 \n" - "1:\n" - /* get devfn into %ecx */ - " movl %esp, %ebp \n" - " movl 8(%ebp), %ecx \n" - /* load 'our' gdt */ - " lgdt %cs:__mygdtaddr \n" - - /* This configures CS properly for real mode. */ - " ljmp $0x28, $__rms_16bit\n" - "__rms_16bit: \n" - " .code16 \n" - /* 16 bit code from here on... */ - - /* Load the segment registers w/ properly configured segment - * descriptors. They will retain these configurations (limits, - * writability, etc.) once protected mode is turned off. */ - " mov $0x30, %ax \n" - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov %ax, %ss \n" - - /* Turn off protection (bit 0 in CR0) */ - " movl %cr0, %eax \n" - " andl $0xFFFFFFFE, %eax \n" - " movl %eax, %cr0 \n" - - /* Now really going into real mode */ - " ljmp $0, $__rms_real\n" - "__rms_real: \n" - - /* put the stack at the end of page zero. - * that way we can easily share it between real and protected, - * since the 16-bit ESP at segment 0 will work for any case. - /* Setup a stack */ - " mov $0x0, %ax \n" - " mov %ax, %ss \n" - " movl $0x1000, %eax \n" - " movl %eax, %esp \n" - - /* Load our 16 it idt */ - " xor %ax, %ax \n" - " mov %ax, %ds \n" - " lidt __myidt \n" - - /* Dump zeros in the other segregs */ - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov $0x40, %ax \n" - " mov %ax, %ds \n" - " mov %cx, %ax \n" - - /* run VGA BIOS at 0xc000:0003 */ - " lcall $0xc000, $0x0003\n" - - /* if we got here, just about done. - * Need to get back to protected mode */ - " movl %cr0, %eax \n" - " orl $0x0000001, %eax\n" /* PE = 1 */ - " movl %eax, %cr0 \n" - - /* Now that we are in protected mode jump to a 32 bit code segment. */ - " data32 ljmp $0x10, $vgarestart\n" - "vgarestart:\n" - " .code32\n" - " movw $0x18, %ax \n" - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov %ax, %ss \n" - - /* restore proper gdt and idt */ - " lgdt %cs:gdtarg \n" - " lidt idtarg \n" - - ".globl vga_exit \n" - "vga_exit: \n" - " mov __stack, %esp \n" - " popal \n" - ); -} - -__asm__ (".text\n""real_mode_switch_end:\n"); -extern char real_mode_switch_end[]; - -/* call vga bios int 10 function 0x4f14 to enable main console - epia-m does not always autosence the main console so forcing it on is good !! */ -void vga_enable_console() -{ - __asm__ __volatile__ ( - /* paranoia -- does ecx get saved? not sure. This is - * the easiest safe thing to do. */ - " pushal \n" - /* save the stack */ - " mov %esp, __stack \n" - - /* load 'our' gdt */ - " lgdt %cs:__mygdtaddr \n" - - /* This configures CS properly for real mode. */ - " ljmp $0x28, $__vga_ec_16bit\n" - "__vga_ec_16bit: \n" - " .code16 \n" - /* 16 bit code from here on... */ - - /* Load the segment registers w/ properly configured segment - * descriptors. They will retain these configurations (limits, - * writability, etc.) once protected mode is turned off. */ - " mov $0x30, %ax \n" - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov %ax, %ss \n" - - /* Turn off protection (bit 0 in CR0) */ - " movl %cr0, %eax \n" - " andl $0xFFFFFFFE, %eax\n" - " movl %eax, %cr0 \n" - - /* Now really going into real mode */ - " ljmp $0, $__vga_ec_real \n" - "__vga_ec_real: \n" - - /* put the stack at the end of page zero. - * that way we can easily share it between real and protected, - * since the 16-bit ESP at segment 0 will work for any case. - /* Setup a stack */ - " mov $0x0, %ax \n" - " mov %ax, %ss \n" - " movl $0x1000, %eax \n" - " movl %eax, %esp \n" - - /* debugging for RGM */ - " mov $0x11, %al \n" - " outb %al, $0x80 \n" - - /* Load our 16 it idt */ - " xor %ax, %ax \n" - " mov %ax, %ds \n" - " lidt __myidt \n" - - /* Dump zeros in the other segregs */ - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - - /* ask bios to enable main console */ - /* set up for int 10 call - values found from X server - * bios call routines */ - //" movw $0x4f14,%ax \n" - " movw $0x0002,%ax \n" - //" movw $0x8003,%bx \n" - " movw $1, %cx \n" - " movw $0, %dx \n" - " movw $0, %di \n" - " int $0x10 \n" - - " movb $0x55, %al \n" - " outb %al, $0x80 \n" - - /* if we got here, just about done. - * Need to get back to protected mode */ - " movl %cr0, %eax \n" - " orl $0x0000001, %eax\n" /* PE = 1 */ - " movl %eax, %cr0 \n" - - /* Now that we are in protected mode jump to a 32 bit code segment. */ - " data32 ljmp $0x10, $vga_ec_restart\n" - "vga_ec_restart:\n" - " .code32\n" - " movw $0x18, %ax \n" - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov %ax, %ss \n" - - /* restore proper gdt and idt */ - " lgdt %cs:gdtarg \n" - " lidt idtarg \n" - " .globl vga__ec_exit \n" - "vga_ec_exit:\n" - " mov __stack, %esp \n" - " popal\n" - ); -} - -void do_vgabios(void) -{ - device_t dev; - unsigned long busdevfn; - unsigned int rom = 0; - unsigned char *buf; - unsigned int size = 64*1024; - int i; - - /* clear vga bios data area */ - for (i = 0x400; i < 0x500; i++) { - *(unsigned char *) i = 0; - } - - dev = dev_find_class(PCI_CLASS_DISPLAY_VGA<<8 , 0); - - if (!dev) { - printk_debug("NO VGA FOUND\n"); - return; - } - printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); - - /* declare rom address here - keep any config data out of the way - * of core LXB stuff */ - - rom = 0xc0000; - // pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); - printk_debug("rom base, size: %x\n", rom); - - buf = (unsigned char *) rom; - if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { - memcpy((void *) 0xc0000, buf, size); - - // write_protect_vgabios(); // in northbridge - - // check signature again - buf = (unsigned char *) 0xc0000; - if (buf[0]==0x55 && buf[1]==0xAA) { - busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn; - printk_debug("bus/devfn = %#x\n", busdevfn); - - real_mode_switch_call_vga(busdevfn); - } else - printk_debug("Failed to copy VGA BIOS to 0xc0000\n"); - } else - printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); - - pci_write_config32(dev, PCI_ROM_ADDRESS, 0); -} - - -// we had hoped to avoid this. -// this is a stub IDT only. It's main purpose is to ignore calls -// to the BIOS. -// no longer. Dammit. We have to respond to these. -struct realidt { - unsigned short offset, cs; -}; - -// from a handy writeup that andrey found. - -// handler. -// There are some assumptions we can make here. -// First, the Top Of Stack (TOS) is located on the top of page zero. -// we can share this stack between real and protected mode. -// that simplifies a lot of things ... -// we'll just push all the registers on the stack as longwords, -// and pop to protected mode. -// second, since this only ever runs as part of coreboot, -// we know all the segment register values -- so we don't save any. -// keep the handler that calls things small. It can do a call to -// more complex code in coreboot itself. This helps a lot as we don't -// have to do address fixup in this little stub, and calls are absolute -// so the handler is relocatable. -void handler(void) -{ - __asm__ __volatile__ ( - " .code16 \n" - "idthandle: \n" - " pushal \n" - " movb $0, %al \n" - " ljmp $0, $callbiosint16\n" - "end_idthandle: \n" - " .code32 \n" - ); -} - -void debughandler(void) -{ - __asm__ __volatile__ ( - " .code16 \n" - "debughandle: \n" - " pushw %cx \n" - " movw $250, %cx \n" - "dbh1: \n" - " loop dbh1 \n" - " popw %cx \n" - " iret \n" - "end_debughandle: \n" - ".code32 \n" - ); -} - -// Calling conventions. The first C function is called with this stuff -// on the stack. They look like value parameters, but note that if you -// modify them they will go back to the INTx function modified. -// the C function will call the biosint function with these as -// REFERENCE parameters. In this way, we can easily get -// returns back to the INTx caller (i.e. vgabios) -void callbiosint(void) -{ - __asm__ __volatile__ ( - " .code16 \n" - "callbiosint16: \n" - " push %ds \n" - " push %es \n" - " push %fs \n" - " push %gs \n" - // clean up the int #. To save space we put it in the lower - // byte. But the top 24 bits are junk. - " andl $0xff, %eax\n" - // this push does two things: - // - put the INT # on the stack as a parameter - // - provides us with a temp for the %cr0 mods. - " pushl %eax \n" - " movl %cr0, %eax\n" - " orl $0x00000001, %eax\n" /* PE = 1 */ - " movl %eax, %cr0\n" - /* Now that we are in protected mode jump to a 32 bit code segment. */ - " data32 ljmp $0x10, $biosprotect\n" - "biosprotect: \n" - " .code32 \n" - " movw $0x18, %ax \n" - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov %ax, %ss \n" - " lidt idtarg \n" - " call biosint \n" - // back to real mode ... - " ljmp $0x28, $__rms_16bit2\n" - "__rms_16bit2: \n" - " .code16 \n" - /* 16 bit code from here on... */ - /* Load the segment registers w/ properly configured segment - * descriptors. They will retain these configurations (limits, - * writability, etc.) once protected mode is turned off. */ - " mov $0x30, %ax \n" - " mov %ax, %ds \n" - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov %ax, %ss \n" - - /* Turn off protection (bit 0 in CR0) */ - " movl %cr0, %eax \n" - " andl $0xFFFFFFFE, %eax \n" - " movl %eax, %cr0 \n" - - /* Now really going into real mode */ - " ljmp $0, $__rms_real2 \n" - "__rms_real2: \n" - - /* Setup a stack - * FixME: where is esp? */ - " mov $0x0, %ax \n" - " mov %ax, %ss \n" - - /* ebugging for RGM */ - " mov $0x11, %al \n" - " outb %al, $0x80 \n" - - /* Load our 16 it idt */ - " xor %ax, %ax \n" - " mov %ax, %ds \n" - " lidt __myidt \n" - - /* Dump zeros in the other segregs */ - " mov %ax, %es \n" - " mov %ax, %fs \n" - " mov %ax, %gs \n" - " mov $0x40, %ax \n" - " mov %ax, %ds \n" - - /* pop the INT # that you pushed earlier */ - " popl %eax \n" - " pop %gs \n" - " pop %fs \n" - " pop %es \n" - " pop %ds \n" - " popal \n" - " iret \n" - " .code32 \n" - ); -} - -enum { - PCIBIOS = 0x1a, - MEMSIZE = 0x12 -}; - -int pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, - unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, - unsigned long *pecx, unsigned long *peax, unsigned long *pflags); - -int handleint21(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, - unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, - unsigned long *pecx, unsigned long *peax, unsigned long *pflags - ); - -extern void vga_exit(void); - -int biosint(unsigned long intnumber, - unsigned long gsfs, unsigned long dses, - unsigned long edi, unsigned long esi, - unsigned long ebp, unsigned long esp, - unsigned long ebx, unsigned long edx, - unsigned long ecx, unsigned long eax, - unsigned long cs_ip, unsigned short stackflags) -{ - unsigned long ip; - unsigned long cs; - unsigned long flags; - int ret = -1; - - ip = cs_ip & 0xffff; - cs = cs_ip >> 16; - flags = stackflags; - - printk_debug("biosint: INT# 0x%lx\n", intnumber); - printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", - eax, ebx, ecx, edx); - printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", - ebp, esp, edi, esi); - printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", - ip, cs, flags); - - // cases in a good compiler are just as good as your own tables. - switch (intnumber) { - case 0 ... 15: - // These are not BIOS service, but the CPU-generated exceptions - printk_info("biosint: Oops, exception %u\n", intnumber); - if (esp < 0x1000) { - printk_debug("Stack contents: "); - while (esp < 0x1000) { - printk_debug("0x%04x ", *(unsigned short *) esp); - esp += 2; - } - printk_debug("\n"); - } - printk_debug("biosint: Bailing out\n"); - // "longjmp" - vga_exit(); - break; - - case PCIBIOS: - ret = pcibios( &edi, &esi, &ebp, &esp, - &ebx, &edx, &ecx, &eax, &flags); - break; - case MEMSIZE: - // who cares. - eax = 64 * 1024; - ret = 0; - break; - case 0x15: - ret=handleint21( &edi, &esi, &ebp, &esp, - &ebx, &edx, &ecx, &eax, &flags); - break; - default: - printk_info("BIOSINT: Unsupport int #0x%x\n", - intnumber); - break; - } - if (ret) - flags |= 1; // carry flags - else - flags &= ~1; - stackflags = flags; - return ret; -} - - -void setup_realmode_idt(void) -{ - extern unsigned char idthandle, end_idthandle; - extern unsigned char debughandle, end_debughandle; - - int i; - struct realidt *idts = (struct realidt *) 0; - int codesize = &end_idthandle - &idthandle; - unsigned char *intbyte, *codeptr; - - // for each int, we create a customized little handler - // that just pushes %ax, puts the int # in %al, - // then calls the common interrupt handler. - // this necessitated because intel didn't know much about - // architecture when they did the 8086 (it shows) - // (hmm do they know anymore even now :-) - // obviously you can see I don't really care about memory - // efficiency. If I did I would probe back through the stack - // and get it that way. But that's really disgusting. - for (i = 0; i < 256; i++) { - idts[i].cs = 0; - codeptr = (char*) 4096 + i * codesize; - idts[i].offset = (unsigned) codeptr; - memcpy(codeptr, &idthandle, codesize); - intbyte = codeptr + 3; - *intbyte = i; - } - - // fixed entry points - - // VGA BIOSes tend to hardcode f000:f065 as the previous handler of - // int10. - // calling convention here is the same as INTs, we can reuse - // the int entry code. - codeptr = (char*) 0xff065; - memcpy(codeptr, &idthandle, codesize); - intbyte = codeptr + 3; - *intbyte = 0x42; /* int42 is the relocated int10 */ - - /* debug handler - useful to set a programmable delay between instructions if the - TF bit is set upon call to real mode */ - idts[1].cs = 0; - idts[1].offset = 16384; - memcpy(16384, &debughandle, &end_debughandle - &debughandle); - - -} - - - -enum { - CHECK = 0xb001, - FINDDEV = 0xb102, - READCONFBYTE = 0xb108, - READCONFWORD = 0xb109, - READCONFDWORD = 0xb10a, - WRITECONFBYTE = 0xb10b, - WRITECONFWORD = 0xb10c, - WRITECONFDWORD = 0xb10d -}; - -// errors go in AH. Just set these up so that word assigns -// will work. KISS. -enum { - PCIBIOS_NODEV = 0x8600, - PCIBIOS_BADREG = 0x8700 -}; - -int -pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, - unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, - unsigned long *pecx, unsigned long *peax, unsigned long *pflags) -{ - unsigned long edi = *pedi; - unsigned long esi = *pesi; - unsigned long ebp = *pebp; - unsigned long esp = *pesp; - unsigned long ebx = *pebx; - unsigned long edx = *pedx; - unsigned long ecx = *pecx; - unsigned long eax = *peax; - unsigned long flags = *pflags; - unsigned short func = (unsigned short) eax; - int retval = 0; - unsigned short devid, vendorid, devfn; - short devindex; /* Use short to get rid of gabage in upper half of 32-bit register */ - unsigned char bus; - device_t dev; - - switch(func) { - case CHECK: - *pedx = 0x4350; - *pecx = 0x2049; - retval = 0; - break; - case FINDDEV: - { - devid = *pecx; - vendorid = *pedx; - devindex = *pesi; - dev = 0; - while ((dev = dev_find_device(vendorid, devid, dev))) { - if (devindex <= 0) - break; - devindex--; - } - if (dev) { - unsigned short busdevfn; - *peax = 0; - // busnum is an unsigned char; - // devfn is an int, so we mask it off. - busdevfn = (dev->bus->secondary << 8) - | (dev->path.u.pci.devfn & 0xff); - printk_debug("0x%x: return 0x%x\n", func, busdevfn); - *pebx = busdevfn; - retval = 0; - } else { - *peax = PCIBIOS_NODEV; - retval = -1; - } - } - break; - case READCONFDWORD: - case READCONFWORD: - case READCONFBYTE: - case WRITECONFDWORD: - case WRITECONFWORD: - case WRITECONFBYTE: - { - unsigned long dword; - unsigned short word; - unsigned char byte; - unsigned char reg; - - devfn = *pebx & 0xff; - bus = *pebx >> 8; - reg = *pedi; - dev = dev_find_slot(bus, devfn); - if (! dev) { - printk_debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); - // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn! - *peax = PCIBIOS_BADREG; - retval = -1; - } - switch(func) { - case READCONFBYTE: - byte = pci_read_config8(dev, reg); - *pecx = byte; - break; - case READCONFWORD: - word = pci_read_config16(dev, reg); - *pecx = word; - break; - case READCONFDWORD: - dword = pci_read_config32(dev, reg); - *pecx = dword; - break; - case WRITECONFBYTE: - byte = *pecx; - pci_write_config8(dev, reg, byte); - break; - case WRITECONFWORD: - word = *pecx; - pci_write_config16(dev, reg, word); - break; - case WRITECONFDWORD: - dword = *pecx; - pci_write_config32(dev, reg, dword); - break; - } - - if (retval) - retval = PCIBIOS_BADREG; - printk_debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", - func, bus, devfn, reg, *pecx); - *peax = 0; - retval = 0; - } - break; - default: - printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); - break; - } - - return retval; -} - -int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp, - unsigned long *esp, unsigned long *ebx, unsigned long *edx, - unsigned long *ecx, unsigned long *eax, unsigned long *flags) -{ - int res=-1; - switch(*eax&0xffff) - { - case 0x5f19: - break; - case 0x5f18: - *eax=0x5f; - *ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory - *ecx=0x060; - res=0; - break; - case 0x5f00: - *eax = 0x8600; - break; - case 0x5f01: - *eax = 0x5f; - *ecx = (*ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768 - res = 0; - break; - case 0x5f02: - *eax=0x5f; - *ebx= (*ebx & 0xffff0000) | 2; - *ecx= (*ecx & 0xffff0000) | 0x401; // PAL + crt only - *edx= (*edx & 0xffff0000) | 0; // TV Layout - default - res=0; - break; - case 0x5f0f: - *eax=0x860f; - break; - } - return res; -} diff --git a/src/mainboard/emulation/qemu-x86/Config.lb b/src/mainboard/emulation/qemu-x86/Config.lb new file mode 100644 index 0000000000..f159772c6b --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/Config.lb @@ -0,0 +1,114 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +default ROM_SIZE = 256 * 1024 +default ROM_SECTION_SIZE = ROM_SIZE +default ROM_SECTION_OFFSET = 0 + +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE=32*1024 +default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) + +## +## Set all of the defaults for an x86 architecture +## + +arch i386 end + +## +## Build the objects we have code for in this directory. +## + +driver mainboard.o +object vgabios.o +if HAVE_PIRQ_TABLE object irq_tables.o end +#object reset.o + +## +## Romcc output +## +makerule ./failover.E + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" +end + +makerule ./failover.inc + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" +end + +makerule ./auto.E + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" +end +makerule ./auto.inc + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" +end + +## +## Build our 16 bit and 32 bit coreboot entry code +## +mainboardinit cpu/x86/16bit/entry16.inc +mainboardinit cpu/x86/32bit/entry32.inc +ldscript /cpu/x86/16bit/entry16.lds +ldscript /cpu/x86/32bit/entry32.lds + +## +## Build our reset vector (This is where coreboot is entered) +## +mainboardinit cpu/x86/16bit/reset16.inc +ldscript /cpu/x86/16bit/reset16.lds + +### Should this be in the northbridge code? +mainboardinit arch/i386/lib/cpu_reset.inc + +## +## Include an id string (For safe flashing) +## +mainboardinit arch/i386/lib/id.inc +ldscript /arch/i386/lib/id.lds + +### +### O.k. We aren't just an intermediary anymore! +### + +## +## Setup RAM +## +mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit ./auto.inc + +## +## Include the secondary Configuration files +## +dir /pc80 +config chip.h + +chip cpu/emulation/qemu-x86 + device pci_domain 0 on + device pci 0.0 on end + device pci 1.0 on end +# register "com1" = "{1}" +# register "com1" = "{1, 0, 0x3f8, 4}" + end +end diff --git a/src/mainboard/emulation/qemu-x86/Options.lb b/src/mainboard/emulation/qemu-x86/Options.lb new file mode 100644 index 0000000000..74e543f737 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/Options.lb @@ -0,0 +1,118 @@ +uses HAVE_MP_TABLE +uses HAVE_PIRQ_TABLE +uses USE_FALLBACK_IMAGE +uses HAVE_FALLBACK_BOOT +uses HAVE_HARD_RESET +uses HAVE_OPTION_TABLE +uses USE_OPTION_TABLE +uses CONFIG_COMPRESS +uses CONFIG_COMPRESSED_PAYLOAD_NRV2B +uses CONFIG_COMPRESSED_PAYLOAD_LZMA +uses CONFIG_PRECOMPRESSED_PAYLOAD +uses CONFIG_ROM_PAYLOAD +uses IRQ_SLOT_COUNT +uses MAINBOARD +uses MAINBOARD_VENDOR +uses MAINBOARD_PART_NUMBER +uses COREBOOT_EXTRA_VERSION +uses ARCH +uses FALLBACK_SIZE +uses STACK_SIZE +uses HEAP_SIZE +uses ROM_SIZE +uses ROM_SECTION_SIZE +uses ROM_IMAGE_SIZE +uses ROM_SECTION_SIZE +uses ROM_SECTION_OFFSET +uses CONFIG_ROM_PAYLOAD_START +uses PAYLOAD_SIZE +uses _ROMBASE +uses _RAMBASE +uses XIP_ROM_SIZE +uses XIP_ROM_BASE +uses HAVE_MP_TABLE +uses CROSS_COMPILE +uses CC +uses HOSTCC +uses OBJCOPY + +uses CONFIG_CONSOLE_SERIAL8250 + + +uses DEFAULT_CONSOLE_LOGLEVEL +uses MAXIMUM_CONSOLE_LOGLEVEL + +default CONFIG_CONSOLE_SERIAL8250=1 +default DEFAULT_CONSOLE_LOGLEVEL=8 +default MAXIMUM_CONSOLE_LOGLEVEL=8 +## ROM_SIZE is the size of boot ROM that this board will use. +default ROM_SIZE = 256*1024 + +### +### Build options +### + +## +## Build code for the fallback boot +## +default HAVE_FALLBACK_BOOT=1 + +## +## no MP table +## +default HAVE_MP_TABLE=0 + +## +## Build code to reset the motherboard from coreboot +## +default HAVE_HARD_RESET=0 + +## +## Build code to export a programmable irq routing table +## +default HAVE_PIRQ_TABLE=0 +default IRQ_SLOT_COUNT=5 +#object irq_tables.o + +## +## Build code to export a CMOS option table +## +default HAVE_OPTION_TABLE=1 + +### +### coreboot layout values +### + +## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. +default ROM_IMAGE_SIZE = 65536 +default FALLBACK_SIZE = 131072 + +## +## Use a small 8K stack +## +default STACK_SIZE=0x2000 + +## +## Use a small 16K heap +## +default HEAP_SIZE=0x4000 + +## +## Only use the option table in a normal image +## +#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE +default USE_OPTION_TABLE = 0 + +default _RAMBASE = 0x00004000 + +default CONFIG_ROM_PAYLOAD = 1 + +## +## The default compiler +## +default CC="$(CROSS_COMPILE)gcc -m32" +default HOSTCC="gcc" + +end + + diff --git a/src/mainboard/emulation/qemu-x86/auto.c b/src/mainboard/emulation/qemu-x86/auto.c new file mode 100644 index 0000000000..d2fa623d68 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/auto.c @@ -0,0 +1,38 @@ +#define ASSEMBLY 1 + +#include +#include +#include +#include +#include +#include +#include +#include "option_table.h" +#include "pc80/mc146818rtc_early.c" +#include "pc80/serial.c" +#include "arch/i386/lib/console.c" + +/* + */ +void udelay(int usecs) +{ + int i; + for(i = 0; i < usecs; i++) + outb(i&0xff, 0x80); +} + +#include "lib/delay.c" +#include "cpu/x86/lapic/boot_cpu.c" +#include "debug.c" + +static void main(void) +{ + /* init_timer();*/ + outb(5, 0x80); + + uart_init(); + console_init(); + + //print_pci_devices(); + //dump_pci_devices(); +} diff --git a/src/mainboard/emulation/qemu-x86/chip.h b/src/mainboard/emulation/qemu-x86/chip.h new file mode 100644 index 0000000000..d6ecdde37b --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/chip.h @@ -0,0 +1,4 @@ +extern struct chip_operations mainboard_emulation_qemu_x86_ops; + +struct mainboard_emulation_qemu_x86_config { +}; diff --git a/src/mainboard/emulation/qemu-x86/cmos.layout b/src/mainboard/emulation/qemu-x86/cmos.layout new file mode 100644 index 0000000000..5ba4c032c1 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/cmos.layout @@ -0,0 +1,74 @@ +entries + +#start-bit length config config-ID name +#0 8 r 0 seconds +#8 8 r 0 alarm_seconds +#16 8 r 0 minutes +#24 8 r 0 alarm_minutes +#32 8 r 0 hours +#40 8 r 0 alarm_hours +#48 8 r 0 day_of_week +#56 8 r 0 day_of_month +#64 8 r 0 month +#72 8 r 0 year +#80 4 r 0 rate_select +#84 3 r 0 REF_Clock +#87 1 r 0 UIP +#88 1 r 0 auto_switch_DST +#89 1 r 0 24_hour_mode +#90 1 r 0 binary_values_enable +#91 1 r 0 square-wave_out_enable +#92 1 r 0 update_finished_enable +#93 1 r 0 alarm_interrupt_enable +#94 1 r 0 periodic_interrupt_enable +#95 1 r 0 disable_clock_updates +#96 288 r 0 temporary_filler +0 384 r 0 reserved_memory +384 1 e 4 boot_option +385 1 e 4 last_boot +386 1 e 1 ECC_memory +388 4 r 0 reboot_bits +392 3 e 5 baud_rate +400 1 e 1 power_on_after_fail +412 4 e 6 debug_level +416 4 e 7 boot_first +420 4 e 7 boot_second +424 4 e 7 boot_third +428 4 h 0 boot_index +432 8 h 0 boot_countdown +1008 16 h 0 check_sum + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +5 0 115200 +5 1 57600 +5 2 38400 +5 3 19200 +5 4 9600 +5 5 4800 +5 6 2400 +5 7 1200 +6 6 Notice +6 7 Info +6 8 Debug +6 9 Spew +7 0 Network +7 1 HDD +7 2 Floppy +7 8 Fallback_Network +7 9 Fallback_HDD +7 10 Fallback_Floppy +#7 3 ROM + +checksums + +checksum 392 1007 1008 + + diff --git a/src/mainboard/emulation/qemu-x86/debug.c b/src/mainboard/emulation/qemu-x86/debug.c new file mode 100644 index 0000000000..714fcc5783 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/debug.c @@ -0,0 +1,128 @@ + +static void print_debug_pci_dev(unsigned dev) +{ + print_debug("PCI: "); + print_debug_hex8((dev >> 16) & 0xff); + print_debug_char(':'); + print_debug_hex8((dev >> 11) & 0x1f); + print_debug_char('.'); + print_debug_hex8((dev >> 8) & 7); +} + +static void print_pci_devices(void) +{ + device_t dev; + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); + dev += PCI_DEV(0,0,1)) { + uint32_t id; + id = pci_read_config32(dev, PCI_VENDOR_ID); + if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0x0000)) { + continue; + } + print_debug_pci_dev(dev); + print_debug("\r\n"); + } +} + +static void dump_pci_device(unsigned dev) +{ + int i; + print_debug_pci_dev(dev); + print_debug("\r\n"); + + for(i = 0; i <= 255; i++) { + unsigned char val; + if ((i & 0x0f) == 0) { + print_debug_hex8(i); + print_debug_char(':'); + } + val = pci_read_config8(dev, i); + print_debug_char(' '); + print_debug_hex8(val); + if ((i & 0x0f) == 0x0f) { + print_debug("\r\n"); + } + } +} + +static void dump_pci_devices(void) +{ + device_t dev; + for(dev = PCI_DEV(0, 0, 0); + dev <= PCI_DEV(0, 0x1f, 0x7); + dev += PCI_DEV(0,0,1)) { + uint32_t id; + id = pci_read_config32(dev, PCI_VENDOR_ID); + if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0xffff) || + (((id >> 16) & 0xffff) == 0x0000)) { + continue; + } + dump_pci_device(dev); + } +} +#if 0 +static void dump_spd_registers(const struct mem_controller *ctrl) +{ + int i; + print_debug("\r\n"); + for(i = 0; i < 4; i++) { + unsigned device; + device = ctrl->channel0[i]; + if (device) { + int j; + print_debug("dimm: "); + print_debug_hex8(i); + print_debug(".0: "); + print_debug_hex8(device); + for(j = 0; j < 256; j++) { + int status; + unsigned char byte; + if ((j & 0xf) == 0) { + print_debug("\r\n"); + print_debug_hex8(j); + print_debug(": "); + } + status = smbus_read_byte(device, j); + if (status < 0) { + print_debug("bad device\r\n"); + break; + } + byte = status & 0xff; + print_debug_hex8(byte); + print_debug_char(' '); + } + print_debug("\r\n"); + } + device = ctrl->channel1[i]; + if (device) { + int j; + print_debug("dimm: "); + print_debug_hex8(i); + print_debug(".1: "); + print_debug_hex8(device); + for(j = 0; j < 256; j++) { + int status; + unsigned char byte; + if ((j & 0xf) == 0) { + print_debug("\r\n"); + print_debug_hex8(j); + print_debug(": "); + } + status = smbus_read_byte(device, j); + if (status < 0) { + print_debug("bad device\r\n"); + break; + } + byte = status & 0xff; + print_debug_hex8(byte); + print_debug_char(' '); + } + print_debug("\r\n"); + } + } +} +#endif diff --git a/src/mainboard/emulation/qemu-x86/failover.c b/src/mainboard/emulation/qemu-x86/failover.c new file mode 100644 index 0000000000..10bb2f48c1 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/failover.c @@ -0,0 +1,29 @@ +#define ASSEMBLY 1 +#include +#include +#include +#include +#include "arch/romcc_io.h" +#include "pc80/mc146818rtc_early.c" +#include "cpu/x86/lapic/boot_cpu.c" + +static void main(void) +{ + /* for now, just always assume failure */ + +#if 0 + /* Is this a cpu reset? */ + if (cpu_init_detected()) { + if (last_boot_normal()) { + asm("jmp __normal_image"); + } else { + asm("jmp __cpu_reset"); + } + } + + /* This is the primary cpu how should I boot? */ + else if (do_normal_boot()) { + asm("jmp __normal_image"); + } +#endif +} diff --git a/src/mainboard/emulation/qemu-x86/irq_tables.c b/src/mainboard/emulation/qemu-x86/irq_tables.c new file mode 100644 index 0000000000..d75eaa4639 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/irq_tables.c @@ -0,0 +1,35 @@ +/* This file was generated by getpir.c, do not modify! + (but if you do, please run checkpir on it to verify) + * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up + * + * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +*/ + +#include + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*6, /* there can be total 6 devices on the bus */ + 0x00, /* Where the interrupt router lies (bus) */ + (0x01<<3)|0x0, /* Where the interrupt router lies (dev) */ + 0, /* IRQs devoted exclusively to PCI usage */ + 0x8086, /* Vendor */ + 0x7000, /* Device */ + 0, /* Crap (miniport) */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0x7, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + { + /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ + {0x00,(0x01<<3)|0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0x0def8}}, 0x0, 0x0}, + {0x00,(0x02<<3)|0x0, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0x0def8}}, 0x1, 0x0}, + {0x00,(0x03<<3)|0x0, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0x0def8}}, 0x2, 0x0}, + {0x00,(0x04<<3)|0x0, {{0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0x0def8}}, 0x3, 0x0}, + {0x00,(0x05<<3)|0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0x0def8}}, 0x4, 0x0}, + {0x00,(0x06<<3)|0x0, {{0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0x0def8}}, 0x5, 0x0}, + } +}; +unsigned long write_pirq_routing_table(unsigned long addr) +{ + return copy_pirq_routing_table(addr); +} diff --git a/src/mainboard/emulation/qemu-x86/mainboard.c b/src/mainboard/emulation/qemu-x86/mainboard.c new file mode 100644 index 0000000000..f00a2cca2d --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/mainboard.c @@ -0,0 +1,39 @@ +#include +#include +#include +#include +#include +#include +#include "chip.h" + +void vga_enable_console(); + +static void vga_init(device_t dev) +{ + /* code to make vga init run in real mode - does work but against the current coreboot philosophy */ + printk_debug("INSTALL REAL-MODE IDT\n"); + setup_realmode_idt(); + printk_debug("DO THE VGA BIOS\n"); + do_vgabios(); + + vga_enable_console(); +} + +static struct device_operations vga_operations = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = vga_init, + .ops_pci = 0, +}; + +static const struct pci_driver vga_driver __pci_driver = { + .ops = &vga_operations, + .vendor = 0x1013, + .device = 0x00b8, +}; + +struct chip_operations mainboard_emulation_qemu_x86_ops = { + CHIP_NAME("QEMU Mainboard") +}; + diff --git a/src/mainboard/emulation/qemu-x86/vgabios.c b/src/mainboard/emulation/qemu-x86/vgabios.c new file mode 100644 index 0000000000..7f42f0ab12 --- /dev/null +++ b/src/mainboard/emulation/qemu-x86/vgabios.c @@ -0,0 +1,838 @@ +#include +#include +#include +#include +#undef __KERNEL__ +#include +#include + +/* vgabios.c. Derived from: */ + +/*------------------------------------------------------------ -*- C -*- + * 2 Kernel Monte a.k.a. Linux loading Linux on x86 + * + * Erik Arjan Hendriks + * + * This version is a derivative of the original two kernel monte + * which is (C) 2000 Scyld. + * + * Copyright (C) 2000 Scyld Computing Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Portions related to the alpha architecture are: + * + * Copyright(C) 2001 University of California. LA-CC Number 01-67. + * This software has been authored by an employee or employees of the + * University of California, operator of the Los Alamos National + * Laboratory under Contract No. W-7405-ENG-36 with the U.S. + * Department of Energy. The U.S. Government has rights to use, + * reproduce, and distribute this software. If the software is + * modified to produce derivative works, such modified software should + * be clearly marked, so as not to confuse it with the version + * available from LANL. + * + * This software may be used and distributed according to the terms + * of the GNU General Public License, incorporated herein by + * reference to http://www.gnu.org/licenses/gpl.html. + * + * This software is provided by the author(s) "as is" and any express + * or implied warranties, including, but not limited to, the implied + * warranties of merchantability and fitness for a particular purpose + * are disclaimed. In no event shall the author(s) be liable for any + * direct, indirect, incidental, special, exemplary, or consequential + * damages (including, but not limited to, procurement of substitute + * goods or services; loss of use, data, or profits; or business + * interruption) however caused and on any theory of liability, + * whether in contract, strict liability, or tort (including + * negligence or otherwise) arising in any way out of the use of this + * software, even if advised of the possibility of such damage. + * + * $Id: vgabios.c,v 1.5 2004/10/06 17:33:52 rminnich Exp $ + *--------------------------------------------------------------------*/ + +/* Modified to be a self sufficient plug in so that it can be used + without reliance on other parts of core coreboot + (C) 2005 Nick.Barker9@btinternet.com + + Used initially for epia-m where there are problems getting the bios + emulator to successfully run this bios. +*/ + +/* Declare a temporary global descriptor table - necessary because the + Core part of the bios no longer sets up any 16 bit segments */ +__asm__ ( + /* pointer to original gdt */ + "gdtarg: \n" + " .word gdt_limit \n" + " .long gdt \n" + + /* compute the table limit */ + "__mygdt_limit = __mygdt_end - __mygdt - 1 \n" + + "__mygdtaddr: \n" + " .word __mygdt_limit \n" + " .long __mygdt \n" + + "__mygdt: \n" + /* selgdt 0, unused */ + " .word 0x0000, 0x0000 \n" + " .byte 0x00, 0x00, 0x00, 0x00 \n" + + /* selgdt 8, unused */ + " .word 0x0000, 0x0000 \n" + " .byte 0x00, 0x00, 0x00, 0x00 \n" + + /* selgdt 0x10, flat code segment */ + " .word 0xffff, 0x0000 \n" + " .byte 0x00, 0x9b, 0xcf, 0x00 \n" + + /* selgdt 0x18, flat data segment */ + " .word 0xffff, 0x0000 \n" + " .byte 0x00, 0x93, 0xcf, 0x00 \n" + + /* selgdt 0x20, unused */ + " .word 0x0000, 0x0000 \n" + " .byte 0x00, 0x00, 0x00, 0x00 \n" + + /* selgdt 0x28 16-bit 64k code at 0x00000000 */ + " .word 0xffff, 0x0000 \n" + " .byte 0, 0x9a, 0, 0 \n" + + /* selgdt 0x30 16-bit 64k data at 0x00000000 */ + " .word 0xffff, 0x0000 \n" + " .byte 0, 0x92, 0, 0 \n" + + "__mygdt_end: \n" +); + +/* Declare a pointer to where our idt is going to be i.e. at mem zero */ +__asm__ ("__myidt: \n" + /* 16-bit limit */ + " .word 1023 \n" + /* 24-bit base */ + " .long 0 \n" + " .word 0 \n" +); + +/* The address arguments to this function are PHYSICAL ADDRESSES */ +static void real_mode_switch_call_vga(unsigned long devfn) +{ + __asm__ __volatile__ ( + // paranoia -- does ecx get saved? not sure. This is + // the easiest safe thing to do. + " pushal \n" + /* save the stack */ + " mov %esp, __stack \n" + " jmp 1f \n" + "__stack: .long 0 \n" + "1:\n" + /* get devfn into %ecx */ + " movl %esp, %ebp \n" + " movl 8(%ebp), %ecx \n" + /* load 'our' gdt */ + " lgdt %cs:__mygdtaddr \n" + + /* This configures CS properly for real mode. */ + " ljmp $0x28, $__rms_16bit\n" + "__rms_16bit: \n" + " .code16 \n" + /* 16 bit code from here on... */ + + /* Load the segment registers w/ properly configured segment + * descriptors. They will retain these configurations (limits, + * writability, etc.) once protected mode is turned off. */ + " mov $0x30, %ax \n" + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov %ax, %ss \n" + + /* Turn off protection (bit 0 in CR0) */ + " movl %cr0, %eax \n" + " andl $0xFFFFFFFE, %eax \n" + " movl %eax, %cr0 \n" + + /* Now really going into real mode */ + " ljmp $0, $__rms_real\n" + "__rms_real: \n" + + /* put the stack at the end of page zero. + * that way we can easily share it between real and protected, + * since the 16-bit ESP at segment 0 will work for any case. + /* Setup a stack */ + " mov $0x0, %ax \n" + " mov %ax, %ss \n" + " movl $0x1000, %eax \n" + " movl %eax, %esp \n" + + /* Load our 16 it idt */ + " xor %ax, %ax \n" + " mov %ax, %ds \n" + " lidt __myidt \n" + + /* Dump zeros in the other segregs */ + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov $0x40, %ax \n" + " mov %ax, %ds \n" + " mov %cx, %ax \n" + + /* run VGA BIOS at 0xc000:0003 */ + " lcall $0xc000, $0x0003\n" + + /* if we got here, just about done. + * Need to get back to protected mode */ + " movl %cr0, %eax \n" + " orl $0x0000001, %eax\n" /* PE = 1 */ + " movl %eax, %cr0 \n" + + /* Now that we are in protected mode jump to a 32 bit code segment. */ + " data32 ljmp $0x10, $vgarestart\n" + "vgarestart:\n" + " .code32\n" + " movw $0x18, %ax \n" + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov %ax, %ss \n" + + /* restore proper gdt and idt */ + " lgdt %cs:gdtarg \n" + " lidt idtarg \n" + + ".globl vga_exit \n" + "vga_exit: \n" + " mov __stack, %esp \n" + " popal \n" + ); +} + +__asm__ (".text\n""real_mode_switch_end:\n"); +extern char real_mode_switch_end[]; + +/* call vga bios int 10 function 0x4f14 to enable main console + epia-m does not always autosence the main console so forcing it on is good !! */ +void vga_enable_console() +{ + __asm__ __volatile__ ( + /* paranoia -- does ecx get saved? not sure. This is + * the easiest safe thing to do. */ + " pushal \n" + /* save the stack */ + " mov %esp, __stack \n" + + /* load 'our' gdt */ + " lgdt %cs:__mygdtaddr \n" + + /* This configures CS properly for real mode. */ + " ljmp $0x28, $__vga_ec_16bit\n" + "__vga_ec_16bit: \n" + " .code16 \n" + /* 16 bit code from here on... */ + + /* Load the segment registers w/ properly configured segment + * descriptors. They will retain these configurations (limits, + * writability, etc.) once protected mode is turned off. */ + " mov $0x30, %ax \n" + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov %ax, %ss \n" + + /* Turn off protection (bit 0 in CR0) */ + " movl %cr0, %eax \n" + " andl $0xFFFFFFFE, %eax\n" + " movl %eax, %cr0 \n" + + /* Now really going into real mode */ + " ljmp $0, $__vga_ec_real \n" + "__vga_ec_real: \n" + + /* put the stack at the end of page zero. + * that way we can easily share it between real and protected, + * since the 16-bit ESP at segment 0 will work for any case. + /* Setup a stack */ + " mov $0x0, %ax \n" + " mov %ax, %ss \n" + " movl $0x1000, %eax \n" + " movl %eax, %esp \n" + + /* debugging for RGM */ + " mov $0x11, %al \n" + " outb %al, $0x80 \n" + + /* Load our 16 it idt */ + " xor %ax, %ax \n" + " mov %ax, %ds \n" + " lidt __myidt \n" + + /* Dump zeros in the other segregs */ + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + + /* ask bios to enable main console */ + /* set up for int 10 call - values found from X server + * bios call routines */ + //" movw $0x4f14,%ax \n" + " movw $0x0002,%ax \n" + //" movw $0x8003,%bx \n" + " movw $1, %cx \n" + " movw $0, %dx \n" + " movw $0, %di \n" + " int $0x10 \n" + + " movb $0x55, %al \n" + " outb %al, $0x80 \n" + + /* if we got here, just about done. + * Need to get back to protected mode */ + " movl %cr0, %eax \n" + " orl $0x0000001, %eax\n" /* PE = 1 */ + " movl %eax, %cr0 \n" + + /* Now that we are in protected mode jump to a 32 bit code segment. */ + " data32 ljmp $0x10, $vga_ec_restart\n" + "vga_ec_restart:\n" + " .code32\n" + " movw $0x18, %ax \n" + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov %ax, %ss \n" + + /* restore proper gdt and idt */ + " lgdt %cs:gdtarg \n" + " lidt idtarg \n" + " .globl vga__ec_exit \n" + "vga_ec_exit:\n" + " mov __stack, %esp \n" + " popal\n" + ); +} + +void do_vgabios(void) +{ + device_t dev; + unsigned long busdevfn; + unsigned int rom = 0; + unsigned char *buf; + unsigned int size = 64*1024; + int i; + + /* clear vga bios data area */ + for (i = 0x400; i < 0x500; i++) { + *(unsigned char *) i = 0; + } + + dev = dev_find_class(PCI_CLASS_DISPLAY_VGA<<8 , 0); + + if (!dev) { + printk_debug("NO VGA FOUND\n"); + return; + } + printk_debug("found VGA: vid=%x, did=%x\n", dev->vendor, dev->device); + + /* declare rom address here - keep any config data out of the way + * of core LXB stuff */ + + rom = 0xc0000; + // pci_write_config32(dev, PCI_ROM_ADDRESS, rom|1); + printk_debug("rom base, size: %x\n", rom); + + buf = (unsigned char *) rom; + if ((buf[0] == 0x55) && (buf[1] == 0xaa)) { + memcpy((void *) 0xc0000, buf, size); + + // write_protect_vgabios(); // in northbridge + + // check signature again + buf = (unsigned char *) 0xc0000; + if (buf[0]==0x55 && buf[1]==0xAA) { + busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn; + printk_debug("bus/devfn = %#x\n", busdevfn); + + real_mode_switch_call_vga(busdevfn); + } else + printk_debug("Failed to copy VGA BIOS to 0xc0000\n"); + } else + printk_debug("BAD SIGNATURE 0x%x 0x%x\n", buf[0], buf[1]); + + pci_write_config32(dev, PCI_ROM_ADDRESS, 0); +} + + +// we had hoped to avoid this. +// this is a stub IDT only. It's main purpose is to ignore calls +// to the BIOS. +// no longer. Dammit. We have to respond to these. +struct realidt { + unsigned short offset, cs; +}; + +// from a handy writeup that andrey found. + +// handler. +// There are some assumptions we can make here. +// First, the Top Of Stack (TOS) is located on the top of page zero. +// we can share this stack between real and protected mode. +// that simplifies a lot of things ... +// we'll just push all the registers on the stack as longwords, +// and pop to protected mode. +// second, since this only ever runs as part of coreboot, +// we know all the segment register values -- so we don't save any. +// keep the handler that calls things small. It can do a call to +// more complex code in coreboot itself. This helps a lot as we don't +// have to do address fixup in this little stub, and calls are absolute +// so the handler is relocatable. +void handler(void) +{ + __asm__ __volatile__ ( + " .code16 \n" + "idthandle: \n" + " pushal \n" + " movb $0, %al \n" + " ljmp $0, $callbiosint16\n" + "end_idthandle: \n" + " .code32 \n" + ); +} + +void debughandler(void) +{ + __asm__ __volatile__ ( + " .code16 \n" + "debughandle: \n" + " pushw %cx \n" + " movw $250, %cx \n" + "dbh1: \n" + " loop dbh1 \n" + " popw %cx \n" + " iret \n" + "end_debughandle: \n" + ".code32 \n" + ); +} + +// Calling conventions. The first C function is called with this stuff +// on the stack. They look like value parameters, but note that if you +// modify them they will go back to the INTx function modified. +// the C function will call the biosint function with these as +// REFERENCE parameters. In this way, we can easily get +// returns back to the INTx caller (i.e. vgabios) +void callbiosint(void) +{ + __asm__ __volatile__ ( + " .code16 \n" + "callbiosint16: \n" + " push %ds \n" + " push %es \n" + " push %fs \n" + " push %gs \n" + // clean up the int #. To save space we put it in the lower + // byte. But the top 24 bits are junk. + " andl $0xff, %eax\n" + // this push does two things: + // - put the INT # on the stack as a parameter + // - provides us with a temp for the %cr0 mods. + " pushl %eax \n" + " movl %cr0, %eax\n" + " orl $0x00000001, %eax\n" /* PE = 1 */ + " movl %eax, %cr0\n" + /* Now that we are in protected mode jump to a 32 bit code segment. */ + " data32 ljmp $0x10, $biosprotect\n" + "biosprotect: \n" + " .code32 \n" + " movw $0x18, %ax \n" + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov %ax, %ss \n" + " lidt idtarg \n" + " call biosint \n" + // back to real mode ... + " ljmp $0x28, $__rms_16bit2\n" + "__rms_16bit2: \n" + " .code16 \n" + /* 16 bit code from here on... */ + /* Load the segment registers w/ properly configured segment + * descriptors. They will retain these configurations (limits, + * writability, etc.) once protected mode is turned off. */ + " mov $0x30, %ax \n" + " mov %ax, %ds \n" + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov %ax, %ss \n" + + /* Turn off protection (bit 0 in CR0) */ + " movl %cr0, %eax \n" + " andl $0xFFFFFFFE, %eax \n" + " movl %eax, %cr0 \n" + + /* Now really going into real mode */ + " ljmp $0, $__rms_real2 \n" + "__rms_real2: \n" + + /* Setup a stack + * FixME: where is esp? */ + " mov $0x0, %ax \n" + " mov %ax, %ss \n" + + /* ebugging for RGM */ + " mov $0x11, %al \n" + " outb %al, $0x80 \n" + + /* Load our 16 it idt */ + " xor %ax, %ax \n" + " mov %ax, %ds \n" + " lidt __myidt \n" + + /* Dump zeros in the other segregs */ + " mov %ax, %es \n" + " mov %ax, %fs \n" + " mov %ax, %gs \n" + " mov $0x40, %ax \n" + " mov %ax, %ds \n" + + /* pop the INT # that you pushed earlier */ + " popl %eax \n" + " pop %gs \n" + " pop %fs \n" + " pop %es \n" + " pop %ds \n" + " popal \n" + " iret \n" + " .code32 \n" + ); +} + +enum { + PCIBIOS = 0x1a, + MEMSIZE = 0x12 +}; + +int pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, + unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, + unsigned long *pecx, unsigned long *peax, unsigned long *pflags); + +int handleint21(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, + unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, + unsigned long *pecx, unsigned long *peax, unsigned long *pflags + ); + +extern void vga_exit(void); + +int biosint(unsigned long intnumber, + unsigned long gsfs, unsigned long dses, + unsigned long edi, unsigned long esi, + unsigned long ebp, unsigned long esp, + unsigned long ebx, unsigned long edx, + unsigned long ecx, unsigned long eax, + unsigned long cs_ip, unsigned short stackflags) +{ + unsigned long ip; + unsigned long cs; + unsigned long flags; + int ret = -1; + + ip = cs_ip & 0xffff; + cs = cs_ip >> 16; + flags = stackflags; + + printk_debug("biosint: INT# 0x%lx\n", intnumber); + printk_debug("biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n", + eax, ebx, ecx, edx); + printk_debug("biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n", + ebp, esp, edi, esi); + printk_debug("biosint: ip 0x%x cs 0x%x flags 0x%x\n", + ip, cs, flags); + + // cases in a good compiler are just as good as your own tables. + switch (intnumber) { + case 0 ... 15: + // These are not BIOS service, but the CPU-generated exceptions + printk_info("biosint: Oops, exception %u\n", intnumber); + if (esp < 0x1000) { + printk_debug("Stack contents: "); + while (esp < 0x1000) { + printk_debug("0x%04x ", *(unsigned short *) esp); + esp += 2; + } + printk_debug("\n"); + } + printk_debug("biosint: Bailing out\n"); + // "longjmp" + vga_exit(); + break; + + case PCIBIOS: + ret = pcibios( &edi, &esi, &ebp, &esp, + &ebx, &edx, &ecx, &eax, &flags); + break; + case MEMSIZE: + // who cares. + eax = 64 * 1024; + ret = 0; + break; + case 0x15: + ret=handleint21( &edi, &esi, &ebp, &esp, + &ebx, &edx, &ecx, &eax, &flags); + break; + default: + printk_info("BIOSINT: Unsupport int #0x%x\n", + intnumber); + break; + } + if (ret) + flags |= 1; // carry flags + else + flags &= ~1; + stackflags = flags; + return ret; +} + + +void setup_realmode_idt(void) +{ + extern unsigned char idthandle, end_idthandle; + extern unsigned char debughandle, end_debughandle; + + int i; + struct realidt *idts = (struct realidt *) 0; + int codesize = &end_idthandle - &idthandle; + unsigned char *intbyte, *codeptr; + + // for each int, we create a customized little handler + // that just pushes %ax, puts the int # in %al, + // then calls the common interrupt handler. + // this necessitated because intel didn't know much about + // architecture when they did the 8086 (it shows) + // (hmm do they know anymore even now :-) + // obviously you can see I don't really care about memory + // efficiency. If I did I would probe back through the stack + // and get it that way. But that's really disgusting. + for (i = 0; i < 256; i++) { + idts[i].cs = 0; + codeptr = (char*) 4096 + i * codesize; + idts[i].offset = (unsigned) codeptr; + memcpy(codeptr, &idthandle, codesize); + intbyte = codeptr + 3; + *intbyte = i; + } + + // fixed entry points + + // VGA BIOSes tend to hardcode f000:f065 as the previous handler of + // int10. + // calling convention here is the same as INTs, we can reuse + // the int entry code. + codeptr = (char*) 0xff065; + memcpy(codeptr, &idthandle, codesize); + intbyte = codeptr + 3; + *intbyte = 0x42; /* int42 is the relocated int10 */ + + /* debug handler - useful to set a programmable delay between instructions if the + TF bit is set upon call to real mode */ + idts[1].cs = 0; + idts[1].offset = 16384; + memcpy(16384, &debughandle, &end_debughandle - &debughandle); + + +} + + + +enum { + CHECK = 0xb001, + FINDDEV = 0xb102, + READCONFBYTE = 0xb108, + READCONFWORD = 0xb109, + READCONFDWORD = 0xb10a, + WRITECONFBYTE = 0xb10b, + WRITECONFWORD = 0xb10c, + WRITECONFDWORD = 0xb10d +}; + +// errors go in AH. Just set these up so that word assigns +// will work. KISS. +enum { + PCIBIOS_NODEV = 0x8600, + PCIBIOS_BADREG = 0x8700 +}; + +int +pcibios(unsigned long *pedi, unsigned long *pesi, unsigned long *pebp, + unsigned long *pesp, unsigned long *pebx, unsigned long *pedx, + unsigned long *pecx, unsigned long *peax, unsigned long *pflags) +{ + unsigned long edi = *pedi; + unsigned long esi = *pesi; + unsigned long ebp = *pebp; + unsigned long esp = *pesp; + unsigned long ebx = *pebx; + unsigned long edx = *pedx; + unsigned long ecx = *pecx; + unsigned long eax = *peax; + unsigned long flags = *pflags; + unsigned short func = (unsigned short) eax; + int retval = 0; + unsigned short devid, vendorid, devfn; + short devindex; /* Use short to get rid of gabage in upper half of 32-bit register */ + unsigned char bus; + device_t dev; + + switch(func) { + case CHECK: + *pedx = 0x4350; + *pecx = 0x2049; + retval = 0; + break; + case FINDDEV: + { + devid = *pecx; + vendorid = *pedx; + devindex = *pesi; + dev = 0; + while ((dev = dev_find_device(vendorid, devid, dev))) { + if (devindex <= 0) + break; + devindex--; + } + if (dev) { + unsigned short busdevfn; + *peax = 0; + // busnum is an unsigned char; + // devfn is an int, so we mask it off. + busdevfn = (dev->bus->secondary << 8) + | (dev->path.u.pci.devfn & 0xff); + printk_debug("0x%x: return 0x%x\n", func, busdevfn); + *pebx = busdevfn; + retval = 0; + } else { + *peax = PCIBIOS_NODEV; + retval = -1; + } + } + break; + case READCONFDWORD: + case READCONFWORD: + case READCONFBYTE: + case WRITECONFDWORD: + case WRITECONFWORD: + case WRITECONFBYTE: + { + unsigned long dword; + unsigned short word; + unsigned char byte; + unsigned char reg; + + devfn = *pebx & 0xff; + bus = *pebx >> 8; + reg = *pedi; + dev = dev_find_slot(bus, devfn); + if (! dev) { + printk_debug("0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn); + // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn! + *peax = PCIBIOS_BADREG; + retval = -1; + } + switch(func) { + case READCONFBYTE: + byte = pci_read_config8(dev, reg); + *pecx = byte; + break; + case READCONFWORD: + word = pci_read_config16(dev, reg); + *pecx = word; + break; + case READCONFDWORD: + dword = pci_read_config32(dev, reg); + *pecx = dword; + break; + case WRITECONFBYTE: + byte = *pecx; + pci_write_config8(dev, reg, byte); + break; + case WRITECONFWORD: + word = *pecx; + pci_write_config16(dev, reg, word); + break; + case WRITECONFDWORD: + dword = *pecx; + pci_write_config32(dev, reg, dword); + break; + } + + if (retval) + retval = PCIBIOS_BADREG; + printk_debug("0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n", + func, bus, devfn, reg, *pecx); + *peax = 0; + retval = 0; + } + break; + default: + printk_err("UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func); + break; + } + + return retval; +} + +int handleint21(unsigned long *edi, unsigned long *esi, unsigned long *ebp, + unsigned long *esp, unsigned long *ebx, unsigned long *edx, + unsigned long *ecx, unsigned long *eax, unsigned long *flags) +{ + int res=-1; + switch(*eax&0xffff) + { + case 0x5f19: + break; + case 0x5f18: + *eax=0x5f; + *ebx=0x545; // MCLK = 133, 32M frame buffer, 256 M main memory + *ecx=0x060; + res=0; + break; + case 0x5f00: + *eax = 0x8600; + break; + case 0x5f01: + *eax = 0x5f; + *ecx = (*ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768 + res = 0; + break; + case 0x5f02: + *eax=0x5f; + *ebx= (*ebx & 0xffff0000) | 2; + *ecx= (*ecx & 0xffff0000) | 0x401; // PAL + crt only + *edx= (*edx & 0xffff0000) | 0; // TV Layout - default + res=0; + break; + case 0x5f0f: + *eax=0x860f; + break; + } + return res; +} -- cgit v1.2.3