From 42f15054b178efe9a4d1c8a4e0c203d1aa4aad01 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 7 Oct 2023 11:16:43 +0200 Subject: memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is in preparation of a larger heap. I went for 2MB because why not? Change-Id: I51f999a10ba894a7f2f5fce224d30bf914107c38 Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/c/coreboot/+/78273 Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu Reviewed-by: Yidi Lin Reviewed-by: Kyösti Mälkki Reviewed-by: Julius Werner --- src/mainboard/emulation/qemu-power9/memlayout.ld | 2 +- src/mainboard/emulation/spike-riscv/memlayout.ld | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/emulation') diff --git a/src/mainboard/emulation/qemu-power9/memlayout.ld b/src/mainboard/emulation/qemu-power9/memlayout.ld index 8209433020..d9c2a7167a 100644 --- a/src/mainboard/emulation/qemu-power9/memlayout.ld +++ b/src/mainboard/emulation/qemu-power9/memlayout.ld @@ -30,5 +30,5 @@ SECTIONS #if ENV_RAMSTAGE STACK(0xa000000, 32K) #endif - RAMSTAGE(0xa008000, 1M) + RAMSTAGE(0xa008000, 2M) } diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv/memlayout.ld index 7ec489292c..b74c0bb330 100644 --- a/src/mainboard/emulation/spike-riscv/memlayout.ld +++ b/src/mainboard/emulation/spike-riscv/memlayout.ld @@ -16,5 +16,5 @@ SECTIONS /* hole at (START + 8M + 14K, 50K) */ ROMSTAGE(START + 8M + 64K, 128K) PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K) - RAMSTAGE(START + 8M + 200K, 256K) + RAMSTAGE(START + 8M + 200K, 2M) } -- cgit v1.2.3