From c706eaf068515690184b3a67ee255a265a808618 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Fri, 17 Feb 2017 18:06:33 +0100 Subject: mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCV MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's already selected by SOC_UCB_RISCV. Change-Id: Ic8a14300cdea2a4ab763b2746434891b72843604 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/18390 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/mainboard/emulation/spike-riscv/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/emulation/spike-riscv') diff --git a/src/mainboard/emulation/spike-riscv/Kconfig b/src/mainboard/emulation/spike-riscv/Kconfig index 755b114bd4..fd2f4f56b2 100644 --- a/src/mainboard/emulation/spike-riscv/Kconfig +++ b/src/mainboard/emulation/spike-riscv/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select SOC_UCB_RISCV select BOARD_ROMSIZE_KB_4096 - select ARCH_BOOTBLOCK_RISCV select DRIVERS_UART_8250MEM select BOOT_DEVICE_NOT_SPI_FLASH -- cgit v1.2.3