From 8f407f695ec9fa2aa52e3685a8f225f03dfecc1d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
Date: Tue, 26 Apr 2016 16:40:55 +0200
Subject: Add board URLs for the RISC-V boards
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Change-Id: Ifdf40986c2407d8c5b0097654b42e056f4498d39
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14518
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/mainboard/emulation/spike-riscv/board_info.txt | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/mainboard/emulation/spike-riscv')

diff --git a/src/mainboard/emulation/spike-riscv/board_info.txt b/src/mainboard/emulation/spike-riscv/board_info.txt
index a1d11f958e..37a0ae9cb7 100644
--- a/src/mainboard/emulation/spike-riscv/board_info.txt
+++ b/src/mainboard/emulation/spike-riscv/board_info.txt
@@ -1,2 +1,3 @@
 Board name: Spike RISCV
 Category: emulation
+Board URL: https://github.com/riscv/riscv-isa-sim
-- 
cgit v1.2.3