From 2ef569a4050c3b0c3c93b3ffb6b4d804b3a7cddf Mon Sep 17 00:00:00 2001
From: Philipp Hug <philipp@hug.cx>
Date: Mon, 31 Dec 2018 14:13:47 +0100
Subject: mb/qemu-riscv: update to match current qemu version

Boots again to payload not found on qemu.

Change-Id: Ie107eb882cbaac5a5a06c1ff990e7b9364377640
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/30554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/mainboard/emulation/qemu-riscv/memlayout.ld | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

(limited to 'src/mainboard/emulation/qemu-riscv/memlayout.ld')

diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 615d1f2b72..032fbddecf 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -14,15 +14,16 @@
  */
 
 #include <memlayout.h>
-
 #include <arch/header.ld>
 
+#define START 0x80000000
+
 SECTIONS
 {
-	DRAM_START(0x0)
-	BOOTBLOCK(0x0, 64K)
-	ROMSTAGE(0x20000, 128K)
-	STACK(0x40000, 0x3ff00)
-	PRERAM_CBMEM_CONSOLE(0x80000, 8K)
-	RAMSTAGE(0x100000, 16M)
+	DRAM_START(START)
+	BOOTBLOCK(START, 64K)
+	STACK(START + 4M, 4K)
+	ROMSTAGE(START + 4M + 64K, 128K)
+	PRERAM_CBMEM_CONSOLE(START + 4M + 192K, 8K)
+	RAMSTAGE(START + 4M + 200K, 16M)
 }
-- 
cgit v1.2.3