From 816a41c904d1ba60ead3227bac83d5470f01c1ec Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 28 Jan 2021 11:09:56 +0100 Subject: mb/emulation/qemu-q35: Consolidate host bridge definitions Move all Q35 register definitions into the q35.h header. Note that real hardware does not have EXT_TSEG_MBYTES, because it is QEMU-specific. Change-Id: I4c86ac0bb05563dee111b9b4a4a71c1c31198acd Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50024 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/emulation/qemu-q35/bootblock.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/emulation/qemu-q35/bootblock.c') diff --git a/src/mainboard/emulation/qemu-q35/bootblock.c b/src/mainboard/emulation/qemu-q35/bootblock.c index 5cf2eb7bee..73036805c5 100644 --- a/src/mainboard/emulation/qemu-q35/bootblock.c +++ b/src/mainboard/emulation/qemu-q35/bootblock.c @@ -25,13 +25,13 @@ static void bootblock_northbridge_init(void) * 4GiB. */ reg = 0; - pci_io_write_config32(PCI_DEV(0,0,0), D0F0_PCIEXBAR_HI, reg); + pci_io_write_config32(HOST_BRIDGE, D0F0_PCIEXBAR_HI, reg); reg = CONFIG_MMCONF_BASE_ADDRESS | 1; /* 256MiB - 0-255 buses. */ - pci_io_write_config32(PCI_DEV(0,0,0), D0F0_PCIEXBAR_LO, reg); + pci_io_write_config32(HOST_BRIDGE, D0F0_PCIEXBAR_LO, reg); /* MCFG is now active. If it's not qemu was started for machine PC */ if (CONFIG(BOOTBLOCK_CONSOLE) && - (pci_read_config32(PCI_DEV(0, 0, 0), D0F0_PCIEXBAR_LO) != + (pci_read_config32(HOST_BRIDGE, D0F0_PCIEXBAR_LO) != (CONFIG_MMCONF_BASE_ADDRESS | 1))) die("You must run qemu for machine Q35 (-M q35)"); } -- cgit v1.2.3