From f795242f26887e08162b77c5ca2967f6ffcfee02 Mon Sep 17 00:00:00 2001 From: Asami Doi Date: Tue, 11 Jun 2019 16:01:31 +0900 Subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag. To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 8192M -nographic Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi Reviewed-on: https://review.coreboot.org/c/coreboot/+/33387 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Julius Werner --- .../qemu-aarch64/include/mainboard/addressmap.h | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h (limited to 'src/mainboard/emulation/qemu-aarch64/include') diff --git a/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h b/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h new file mode 100644 index 0000000000..6f0c80257b --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Asami Doi + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +/* + * Memory map for QEMU virt machine since + * a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019): + * + * 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device. + * 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O. + * 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support. + * 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings + * + * 0x0000_0000..0x0080_0000: Flash memory + * 0x0900_0000..0x0900_1000: UART (PL011) + * 0x0901_0000..0x0901_1000: RTC (PL031) + * 0x0903_0000..0x0903_1000: GPIO (PL061) + * 0x0904_0000..0x0904_1000: Secure UART (PL011) + * 0x0905_0000..0x0907_0000: SMMU (smmu-v3) + * 0x0a00_0000..0x0a00_0200: MMIO (virtio) + * 0x0c00_0000..0x0e00_0000: Platform bus + * 0x4000_0000..: RAM + */ +#define VIRT_UART_BASE 0x09000000 +#define VIRT_RTC_BASE 0x09010000 +#define VIRT_GPIO_BASE 0x09030000 +#define VIRT_SECURE_UART_BASE 0x09040000 +#define VIRT_SMMU_BASE 0x09050000 +#define VIRT_MMIO_BASE 0x0a000000 +#define VIRT_PLATFORM_BUS_BASE 0x0c000000 -- cgit v1.2.3