From 2a3f9f543a04a6382c40bc9b4f6a3b5c4846a4f2 Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Mon, 26 Aug 2019 13:59:54 +0300
Subject: smsc/superio/sio1007: Fix header name
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The file chip.h has a special purpose for defining the
configuration structure used in static devicetree.

Change-Id: If0289c29ca72768009c1b7166311bc4c3cee4171
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
 src/mainboard/compulab/intense_pc/romstage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/mainboard/compulab/intense_pc')

diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c
index 6c3d980b65..74f00c21d1 100644
--- a/src/mainboard/compulab/intense_pc/romstage.c
+++ b/src/mainboard/compulab/intense_pc/romstage.c
@@ -17,7 +17,7 @@
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
 #define SIO_PORT 0x164e
-- 
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