From 78c3e1c50ac0bf0064d38aeb9805dbfe7aafe973 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 6 Dec 2020 12:20:17 +0100 Subject: mb/*: Remove SATA_AHCI config from SKL/KBL based devicetrees MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SATA_AHCI is already the default mode for SKL/KBL based mainboards. Therefore, remove its configuration from all related devicetrees. Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: Ib5222c1b0314365b634f8585e8a97e0054127fe9 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/48378 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/clevo') diff --git a/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb b/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb index f65a3d35d5..a223b7e529 100644 --- a/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb +++ b/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb @@ -80,7 +80,6 @@ chip soc/intel/skylake device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 device pci 17.0 on # SATA - register "SataMode" = "SATA_AHCI" register "SataSalpSupport" = "0" # Ports register "SataPortsEnable[0]" = "1" -- cgit v1.2.3