From 33768dd08b9ba3be151c2c1b20d953c0b2475e85 Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Fri, 20 Dec 2019 11:08:35 +0300 Subject: biostar/a68n_5200: Switch away from ROMCC_BOOTBLOCK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Following the example of change CB:37737 (ee8f969). Switching was done by moving a SIO configuration and the clocks setup from 'romstage.c' to 'bootblock.c'. Tested-by: Damien Zammit Signed-off-by: Mike Banon Signed-off-by: Damien Zammit Change-Id: I2e710ac61843c09a055523c7971e4c05bae56a37 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37872 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Kyösti Mälkki --- src/mainboard/biostar/a68n_5200/Kconfig | 4 -- src/mainboard/biostar/a68n_5200/Kconfig.name | 4 +- src/mainboard/biostar/a68n_5200/Makefile.inc | 2 + src/mainboard/biostar/a68n_5200/bootblock.c | 72 ++++++++++++++++++++++++++++ src/mainboard/biostar/a68n_5200/irq_tables.c | 1 + src/mainboard/biostar/a68n_5200/romstage.c | 72 ---------------------------- 6 files changed, 77 insertions(+), 78 deletions(-) create mode 100644 src/mainboard/biostar/a68n_5200/bootblock.c delete mode 100644 src/mainboard/biostar/a68n_5200/romstage.c (limited to 'src/mainboard/biostar/a68n_5200') diff --git a/src/mainboard/biostar/a68n_5200/Kconfig b/src/mainboard/biostar/a68n_5200/Kconfig index f608513d0e..e4271d34fe 100644 --- a/src/mainboard/biostar/a68n_5200/Kconfig +++ b/src/mainboard/biostar/a68n_5200/Kconfig @@ -15,14 +15,10 @@ # GNU General Public License for more details. # -config BOARD_BIOSTAR_A68N5200 - def_bool n - if BOARD_BIOSTAR_A68N5200 config BOARD_SPECIFIC_OPTIONS def_bool y - #select ROMCC_BOOTBLOCK select CPU_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select SOUTHBRIDGE_AMD_AGESA_YANGTZE diff --git a/src/mainboard/biostar/a68n_5200/Kconfig.name b/src/mainboard/biostar/a68n_5200/Kconfig.name index 6d765d2712..52a7f1511a 100644 --- a/src/mainboard/biostar/a68n_5200/Kconfig.name +++ b/src/mainboard/biostar/a68n_5200/Kconfig.name @@ -1,2 +1,2 @@ -#config BOARD_BIOSTAR_A68N5200 -# bool"A68N-5200" +config BOARD_BIOSTAR_A68N5200 + bool "A68N-5200" diff --git a/src/mainboard/biostar/a68n_5200/Makefile.inc b/src/mainboard/biostar/a68n_5200/Makefile.inc index f8895faa92..4dde2cfd1e 100644 --- a/src/mainboard/biostar/a68n_5200/Makefile.inc +++ b/src/mainboard/biostar/a68n_5200/Makefile.inc @@ -13,6 +13,8 @@ # GNU General Public License for more details. # +bootblock-y += bootblock.c + romstage-y += buildOpts.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c diff --git a/src/mainboard/biostar/a68n_5200/bootblock.c b/src/mainboard/biostar/a68n_5200/bootblock.c new file mode 100644 index 0000000000..395419b76f --- /dev/null +++ b/src/mainboard/biostar/a68n_5200/bootblock.c @@ -0,0 +1,72 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * Copyright (C) 2016 Edward O'Callaghan + * Copyright (C) 2017 Damien Zammit + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO) +#define CLKIN_DEV PNP_DEV(0x2e, IT8728F_GPIO) + +static void sbxxx_enable_48mhzout(void) +{ + u32 reg32; + + /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ + reg32 = misc_read32(0x28); + reg32 &= 0xfff8ffff; + misc_write32(0x28, reg32); + + /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ + reg32 = misc_read32(0x40); + reg32 &= 0xffffbffb; + misc_write32(0x40, reg32); +} + +void bootblock_mainboard_early_init(void) +{ + u8 byte; + + /* Enable the AcpiMmio space */ + pm_io_write8(0x24, 1); + + /* Set LPC decode enables. */ + pci_devfn_t dev = PCI_DEV(0, 0x14, 3); + pci_write_config32(dev, 0x44, 0xff03ffd5); + + /* enable SIO LPC decode */ + byte = pci_read_config8(dev, 0x48); + byte |= 3; /* 2e, 2f */ + pci_write_config8(dev, 0x48, byte); + + /* enable serial decode */ + byte = pci_read_config8(dev, 0x44); + byte |= (1 << 6); /* 0x3f8 */ + pci_write_config8(dev, 0x44, byte); + + /* enable SIO clock */ + sbxxx_enable_48mhzout(); + + /* Enable serial output on it8728f */ + ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48); + ite_kill_watchdog(GPIO_DEV); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/biostar/a68n_5200/irq_tables.c b/src/mainboard/biostar/a68n_5200/irq_tables.c index 530c132a05..ab26cbac1f 100644 --- a/src/mainboard/biostar/a68n_5200/irq_tables.c +++ b/src/mainboard/biostar/a68n_5200/irq_tables.c @@ -16,6 +16,7 @@ #include #include #include +#include #include static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, diff --git a/src/mainboard/biostar/a68n_5200/romstage.c b/src/mainboard/biostar/a68n_5200/romstage.c deleted file mode 100644 index 5e0cd7c83d..0000000000 --- a/src/mainboard/biostar/a68n_5200/romstage.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * Copyright (C) 2016 Edward O'Callaghan - * Copyright (C) 2017 Damien Zammit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1) -#define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO) -#define CLKIN_DEV PNP_DEV(0x2e, IT8728F_GPIO) - -static void sbxxx_enable_48mhzout(void) -{ - /* most likely programming to 48MHz out signal */ - u32 reg32; - reg32 = misc_read32(0x28); - reg32 &= 0xfff8ffff; - misc_write32(0x28, reg32); - - reg32 = misc_read32(0x40); - reg32 &= 0xffffbffb; - misc_write32(0x40, reg32); -} - -void board_BeforeAgesa(struct sysinfo *cb) -{ - u8 byte; - - /* Enable the AcpiMmio space */ - pm_io_write8(0x24, 1); - - /* Set LPC decode enables. */ - pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - pci_write_config32(dev, 0x44, 0xff03ffd5); - - /* enable SIO LPC decode */ - byte = pci_read_config8(dev, 0x48); - byte |= 3; /* 2e, 2f */ - pci_write_config8(dev, 0x48, byte); - - /* enable serial decode */ - byte = pci_read_config8(dev, 0x44); - byte |= (1 << 6); /* 0x3f8 */ - pci_write_config8(dev, 0x44, byte); - - /* run ite */ - sbxxx_enable_48mhzout(); - ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48); - ite_kill_watchdog(GPIO_DEV); - ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} -- cgit v1.2.3