From 657d68bddc030e38bc19eb4eef07f59b5e5258e4 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 3 Dec 2019 12:36:09 +0200 Subject: AGESA,binaryPI: Move PORT80 selection to C bootblock MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Because the function is implemented in C, post_code() calls from cache_as_ram.S and other early assembly entry files may not currently work for cold boots. Assembly implementation needs to follow one day. This effectively removes PORT80 routing from boards with ROMCC_BOOTBLOCK. Change-Id: I71aa94b33bd6f65e243724810472a440e98e0750 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/37451 Tested-by: build bot (Jenkins) Reviewed-by: Michał Żygowski --- src/mainboard/biostar/a68n_5200/romstage.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'src/mainboard/biostar/a68n_5200/romstage.c') diff --git a/src/mainboard/biostar/a68n_5200/romstage.c b/src/mainboard/biostar/a68n_5200/romstage.c index ddcf4d0f78..5d210fa4be 100644 --- a/src/mainboard/biostar/a68n_5200/romstage.c +++ b/src/mainboard/biostar/a68n_5200/romstage.c @@ -58,12 +58,6 @@ void board_BeforeAgesa(struct sysinfo *cb) pci_devfn_t dev = PCI_DEV(0, 0x14, 3); pci_write_config32(dev, 0x44, 0xff03ffd5); - if (CONFIG(POST_DEVICE_PCI_PCIE)) - hudson_pci_port80(); - - if (CONFIG(POST_DEVICE_LPC)) - hudson_lpc_port80(); - /* enable SIO LPC decode */ byte = pci_read_config8(dev, 0x48); byte |= 3; /* 2e, 2f */ -- cgit v1.2.3