From 9550e97304ecc1c1b6271d50ea089c82b9a82946 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Fri, 20 Mar 2020 13:56:46 +0100 Subject: acpi: correct the processor devices scope MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The ACPI Spec 2.0 states, that Processor declarations should be made within the ACPI namespace \_SB and not \_PR anymore. \_PR is deprecated and is removed here. Additionally add processor scope patching for P-State SSDT created by AGESA, becasue AGESA creates the tables with processors in \_PR scope. TEST=boot Debian Linux on PC Engines apu2, check dmesg that there are no errors, decompile ACPI tables with acpica to check whether the processor scope is correct and if IASL does not complain on wrong checksum, run FWTS Signed-off-by: Michał Żygowski Change-Id: I35f112e9f9f15f06ddb83b4192f082f9e51a969c Reviewed-on: https://review.coreboot.org/c/coreboot/+/39698 Reviewed-by: Angel Pons Reviewed-by: HAOUAS Elyes Tested-by: build bot (Jenkins) --- src/mainboard/bap/ode_e20XX/dsdt.asl | 2 +- src/mainboard/bap/ode_e21XX/dsdt.asl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/bap') diff --git a/src/mainboard/bap/ode_e20XX/dsdt.asl b/src/mainboard/bap/ode_e20XX/dsdt.asl index a7914191d0..15b241f897 100644 --- a/src/mainboard/bap/ode_e20XX/dsdt.asl +++ b/src/mainboard/bap/ode_e20XX/dsdt.asl @@ -34,7 +34,7 @@ DefinitionBlock ( /* PCI IRQ mapping for the Southbridge */ #include - /* Describe the processor tree (\_PR) */ + /* Describe the processor tree (\_SB) */ #include /* Contains the supported sleep states for this chipset */ diff --git a/src/mainboard/bap/ode_e21XX/dsdt.asl b/src/mainboard/bap/ode_e21XX/dsdt.asl index 4bf4dc8276..8440ecaa0f 100644 --- a/src/mainboard/bap/ode_e21XX/dsdt.asl +++ b/src/mainboard/bap/ode_e21XX/dsdt.asl @@ -34,7 +34,7 @@ DefinitionBlock ( /* PCI IRQ mapping for the Southbridge */ #include - /* Describe the processor tree (\_PR) */ + /* Describe the processor tree (\_SB) */ #include /* Contains the supported sleep states for this chipset */ -- cgit v1.2.3