From 1b183aa6ce78af27c2e42aa51626f76a4b5d5bb0 Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Sun, 26 Feb 2017 10:11:21 +0200
Subject: binaryPI boards: Drop any ACPI S3 support
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None of the boards currently have HAVE_ACPI_RESUME and
and ACPI S3 support calls should not appear under board
directories anyways.

Change-Id: I1abd40ddba64be25b823abf801988863950c1eb5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18500
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
---
 src/mainboard/bap/ode_e21XX/mainboard.c |  4 ----
 src/mainboard/bap/ode_e21XX/romstage.c  | 36 ++++++++++-----------------------
 2 files changed, 11 insertions(+), 29 deletions(-)

(limited to 'src/mainboard/bap/ode_e21XX')

diff --git a/src/mainboard/bap/ode_e21XX/mainboard.c b/src/mainboard/bap/ode_e21XX/mainboard.c
index 1e82768ddd..8693737aac 100644
--- a/src/mainboard/bap/ode_e21XX/mainboard.c
+++ b/src/mainboard/bap/ode_e21XX/mainboard.c
@@ -20,7 +20,6 @@
 #include <device/pci_def.h>
 #include <arch/acpi.h>
 #include <northbridge/amd/pi/BiosCallOuts.h>
-#include <cpu/amd/pi/s3_resume.h>
 #include <northbridge/amd/pi/agesawrapper.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
@@ -31,9 +30,6 @@
 static void mainboard_enable(device_t dev)
 {
 	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
-
-	if (acpi_is_wakeup_s3())
-		agesawrapper_fchs3earlyrestore();
 }
 
 struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c
index 5deeaa8eda..d8342c917f 100644
--- a/src/mainboard/bap/ode_e21XX/romstage.c
+++ b/src/mainboard/bap/ode_e21XX/romstage.c
@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
-#include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
 #include <device/pnp_def.h>
@@ -31,7 +30,6 @@
 #include <cpu/x86/bist.h>
 #include <cpu/x86/lapic.h>
 #include <southbridge/amd/pi/hudson/hudson.h>
-#include <cpu/amd/pi/s3_resume.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81866d/f81866d.h>
 
@@ -81,29 +79,17 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x39);
 	AGESAWRAPPER(amdinitearly);
-	int s3resume = acpi_is_wakeup_s3();
-	if (!s3resume) {
-		post_code(0x40);
-		AGESAWRAPPER(amdinitpost);
-
-		//PspMboxBiosCmdDramInfo();
-		post_code(0x41);
-		AGESAWRAPPER(amdinitenv);
-		/*
-		  If code hangs here, please check cahaltasm.S
-		*/
-		disable_cache_as_ram();
-	} else { /* S3 detect */
-		printk(BIOS_INFO, "S3 detected\n");
-
-		post_code(0x60);
-		AGESAWRAPPER(amdinitresume);
-
-		AGESAWRAPPER(amds3laterestore);
-
-		post_code(0x61);
-		prepare_for_resume();
-	}
+
+	post_code(0x40);
+	AGESAWRAPPER(amdinitpost);
+
+	//PspMboxBiosCmdDramInfo();
+	post_code(0x41);
+	AGESAWRAPPER(amdinitenv);
+	/*
+	  If code hangs here, please check cahaltasm.S
+	*/
+	disable_cache_as_ram();
 
 	outb(0xEA, 0xCD6);
 	outb(0x1, 0xcd7);
-- 
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