From 66ee42daba635a0748262092b28a3ee87bbfd573 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 20 May 2020 23:34:54 +0200 Subject: mb/*/*/buildOpts.c: Clean up whitespace Drop multiple blank lines and use one space inside C-style comments. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589 Tested-by: build bot (Jenkins) Reviewed-by: Mike Banon Reviewed-by: Krystian Hebel --- src/mainboard/bap/ode_e20XX/buildOpts.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'src/mainboard/bap/ode_e20XX') diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c index ec4e17e655..4938d95bb7 100644 --- a/src/mainboard/bap/ode_e20XX/buildOpts.c +++ b/src/mainboard/bap/ode_e20XX/buildOpts.c @@ -9,7 +9,6 @@ * build option selections desired for that platform. * * For Information about this file, see @ref platforminstall. - * */ #include @@ -29,7 +28,6 @@ #define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE - #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #undef INSTALL_FT3_SOCKET_SUPPORT @@ -152,7 +150,7 @@ #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed -/* Process the options... +/* Process the options... * This file include MUST occur AFTER the user option selection settings */ /* @@ -214,7 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] = #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList -/* Include the files that instantiate the configuration definitions. */ +/* Include the files that instantiate the configuration definitions. */ #include "cpuRegisters.h" #include "cpuFamRegisters.h" #include "cpuFamilyTranslation.h" @@ -249,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] = //#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency // -///* QUANDRANK_TYPE*/ +///* QUANDRANK_TYPE */ //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM // -- cgit v1.2.3