From 342ac64a5d6f5ab639fb140ae69f9b3597878cba Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Mon, 14 Apr 2014 16:44:19 -0500 Subject: southbridge/hudson: Use MMIO instead of PIO to access PM space The MMIO region is set up by AGESA very early on, so we can use it to access the PM register space in ramstage. 16-bit accessors are also provided to simplify some setup tasks. 16-bit accesses are not possible via PIO. The pm2_iowrite/read accessors are removed, as they are not used. Change-Id: Ie7967b5086eb004525c39721338c6495aedc8165 Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/5503 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/asus/f2a85-m/mptable.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard/asus') diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c index fc16211292..6427a1b13a 100644 --- a/src/mainboard/asus/f2a85-m/mptable.c +++ b/src/mainboard/asus/f2a85-m/mptable.c @@ -95,10 +95,10 @@ static void *smp_write_config_table(void *v) /* I/O APICs: APIC ID Version State Address */ dword = 0; - dword = pm_ioread(0x34) & 0xF0; - dword |= (pm_ioread(0x35) & 0xFF) << 8; - dword |= (pm_ioread(0x36) & 0xFF) << 16; - dword |= (pm_ioread(0x37) & 0xFF) << 24; + dword = pm_read8(0x34) & 0xF0; + dword |= (pm_read8(0x35) & 0xFF) << 8; + dword |= (pm_read8(0x36) & 0xFF) << 16; + dword |= (pm_read8(0x37) & 0xFF) << 24; /* Set IO APIC ID onto IO_APIC_ID */ write32 (dword, 0x00); write32 (dword + 0x10, IO_APIC_ID << 24); -- cgit v1.2.3