From ffcf641cc4cb9fc5b8a49599d001fbe180dea6fa Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 5 Mar 2020 01:30:49 +0100 Subject: mb/asus/p8z77-v_lx2: Add new mainboard This is an ATX mainboard with a LGA1155 socket and four DDR3 DIMM slots. Porting was done using autoport and then doing a bunch of manual edits. Working: - All four DIMM slots - Serial port to emit spam - PS/2 keyboard - S3 suspend/resume - Rear USB ports - Integrated graphics (libgfxinit) - HDMI and VGA - All PCIe ports - Realtek GbE (coreboot must set the MAC address) - Both PCI ports behind the ASM1083 PCI bridge - SATA ports - Native raminit - Flashing with flashrom - Rear audio output - VBT - SeaBIOS to boot Arch Linux Untested: - PS/2 mouse - The other audio jacks - EHCI debug - Front USB headers - Non-Linux OSes Change-Id: Ia5d9176b6f435977ecdd4fc82fc4bc0974d8d6a4 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/39299 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel --- src/mainboard/asus/p8z77-v_lx2/devicetree.cb | 112 +++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 src/mainboard/asus/p8z77-v_lx2/devicetree.cb (limited to 'src/mainboard/asus/p8z77-v_lx2/devicetree.cb') diff --git a/src/mainboard/asus/p8z77-v_lx2/devicetree.cb b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb new file mode 100644 index 0000000000..7ce2840d36 --- /dev/null +++ b/src/mainboard/asus/p8z77-v_lx2/devicetree.cb @@ -0,0 +1,112 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2020 Angel Pons +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +chip northbridge/intel/sandybridge + device cpu_cluster 0 on + chip cpu/intel/model_206ax + register "c1_acpower" = "1" + register "c1_battery" = "1" + register "c2_acpower" = "3" + register "c2_battery" = "3" + register "c3_acpower" = "5" + register "c3_battery" = "5" + device lapic 0 on end + device lapic 0xacac off end + end + end + register "pci_mmio_size" = "2048" + device domain 0 on + subsystemid 0x1043 0x84ca inherit + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PCIEX16_1 + device pci 02.0 on end # iGPU + + chip southbridge/intel/bd82x6x + register "c2_latency" = "0x0065" + register "gen1_dec" = "0x000c0291" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x3f" + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + register "superspeed_capable_ports" = "0x0000000f" + register "xhci_overcurrent_mapping" = "0x00000c03" + register "xhci_switchable_ports" = "0x0000000f" + + device pci 14.0 on end # xHCI + device pci 16.0 on end # MEI #1 + device pci 16.1 off end # MEI #2 + device pci 16.2 off end # ME IDE-R + device pci 16.3 off end # ME KT + device pci 19.0 off end # Intel GbE + device pci 1a.0 on end # EHCI #2 + device pci 1b.0 on end # HD Audio + + device pci 1c.0 on end # RP #1: PCIEX16_2 (electrical x4) + device pci 1c.1 off end # RP #2: + device pci 1c.2 off end # RP #3: + device pci 1c.3 off end # RP #4: + device pci 1c.4 on end # RP #5: RTL8111 GbE NIC + device pci 1c.5 on end # RP #6: ASM1083 PCI Bridge + device pci 1c.6 on end # RP #7: PCIEX1_1 + device pci 1c.7 on end # RP #8: PCIEX1_2 + + device pci 1d.0 on end # EHCI #1 + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on # LPC bridge + chip superio/nuvoton/nct6779d + device pnp 2e.1 off end # Parallel + device pnp 2e.2 on # UART A + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 off end # UART B, IR + device pnp 2e.5 on # Keyboard + io 0x60 = 0x0060 + io 0x62 = 0x0064 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off end # CIR + device pnp 2e.7 off end # GPIO6-8 + device pnp 2e.8 off end # WDT1, GPIO0, GPIO1 + device pnp 2e.108 on end # GPIO0 + device pnp 2e.9 off end # GPIO1-8 + device pnp 2e.109 off end # GPIO1 + device pnp 2e.209 off end # GPIO2 + device pnp 2e.309 off end # GPIO3 + device pnp 2e.409 off end # GPIO4 + device pnp 2e.509 on end # GPIO5 + device pnp 2e.609 off end # GPIO6 + device pnp 2e.709 off end # GPIO7 + device pnp 2e.a on end # ACPI + device pnp 2e.b on # H/W Monitor, FP LED + io 0x60 = 0x0290 + io 0x62 = 0 + irq 0x70 = 0 + end + device pnp 2e.d off end # WDT1 + device pnp 2e.e off end # CIR Wake-up + device pnp 2e.f off end # Push-pull/Open-drain + device pnp 2e.14 off end # Port 80 UART + device pnp 2e.16 off end # Deep Sleep + end + end + device pci 1f.2 on end # SATA (AHCI) + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA (Legacy) + device pci 1f.6 off end # Thermal + end + end +end -- cgit v1.2.3