From d28d5071906e15c88939d889fbe40b117f5c303b Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 16 Jun 2019 23:36:28 +0200 Subject: sb/intel/bd82x6x/lpc: Set up default LPC decode ranges This sets up some common default LPC decode ranges in a common place. This may set up more decode ranges than needed but that typically does not hurt. Mainboards needing additional ranges can do so in the mainboard pch_enable_lpc hook. Change-Id: Ifeb5a862e56f415aa847d0118a33a31537ab8037 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/33549 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/asus/p8z77-m_pro/romstage.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'src/mainboard/asus/p8z77-m_pro') diff --git a/src/mainboard/asus/p8z77-m_pro/romstage.c b/src/mainboard/asus/p8z77-m_pro/romstage.c index b5593ec23c..9c5e443908 100644 --- a/src/mainboard/asus/p8z77-m_pro/romstage.c +++ b/src/mainboard/asus/p8z77-m_pro/romstage.c @@ -32,12 +32,6 @@ void pch_enable_lpc(void) { - pci_write_config16(PCH_LPC_DEV, LPC_EN, - CNF1_LPC_EN | CNF2_LPC_EN | - KBC_LPC_EN | COMB_LPC_EN); - - /* Set COMB/COM2 IO range to 2F8h-2FFh */ - pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10); } void mainboard_rcba_config(void) -- cgit v1.2.3