From 803029685f96bccac13359fc616d1577508ba764 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Mon, 7 Nov 2022 11:49:22 +0100
Subject: nb/intel/x4x: Remove apic 0 from devicetree
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This is added at runtime.

Change-Id: I7716f8a972e2280179aa6aee00488b22413c0c73
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69298
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

(limited to 'src/mainboard/asus/p5qc/variants/p5q_se')

diff --git a/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb
index f099ab297d..602ef02c5b 100644
--- a/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb
+++ b/src/mainboard/asus/p5qc/variants/p5q_se/devicetree.cb
@@ -1,12 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 chip northbridge/intel/x4x		# Northbridge
-	device cpu_cluster 0 on
-		ops x4x_cpu_bus_ops		# APIC cluster
-		chip cpu/intel/socket_LGA775
-			device lapic 0 on end
-		end
-	end
+	device cpu_cluster 0 on ops x4x_cpu_bus_ops end		# APIC cluster
 	device domain 0 on
 		ops x4x_pci_domain_ops		# PCI domain
 		device pci 0.0 on  end		# Host Bridge
-- 
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