From 6390e525fcbad63fbf4c0043ae248b24b9a9d0c6 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 21 Nov 2016 17:11:48 +0100 Subject: mb/asus/p5gc-mx: Add mainboard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested to work: * GPU (Nvidia gt210) in PCIe x16 slot; * SATA; * serial; * 800MHz and 1067MHz FSB Core 2 Duo CPUs; * ethernet; * native VGA graphic init. What does not work: * resume from s3 suspend; * superio hardware monitor (not initialised in coreboot). Quirks: * does not boot with just one dimm in slot B. Change-Id: Ide5494be7f2f16d6b5cfd2ccf4ec438f0587add5 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/17558 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl | 47 +++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl (limited to 'src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl') diff --git a/src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl b/src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl new file mode 100644 index 0000000000..408397bad4 --- /dev/null +++ b/src/mainboard/asus/p5gc-mx/acpi/ich7_pci_irqs.asl @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* This is board specific information: IRQ routing for the + * 0:1e.0 PCI bridge of the ICH7 + */ + + +If (PICM) { + Return (Package() { + Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 }, + Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 }, + Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 }, + Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 }, + Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x15 }, + Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x16 }, + Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x17 }, + Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x14 }, + Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 }, + + }) +} Else { + Return (Package() { + Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKD, 0x00 }, + Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKF, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LPCB.LNKG, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LPCB.LNKH, 0x00 }, + Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LPCB.LNKE, 0x00 }, + Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 }, + + }) +} -- cgit v1.2.3