From 157b189f6b97b6e9ecd8d29edbbd045fbbc231f5 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 16 Aug 2019 14:02:25 +0300 Subject: cpu/intel: Enter romstage without BIST MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/mainboard/asus/p3b-f/romstage.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/mainboard/asus/p3b-f') diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c index 387cecb5dd..cc5b764b01 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/romstage.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ @@ -65,11 +64,10 @@ static void disable_spd(void) outb(0x67, PM_IO_BASE + 0x37); } -void mainboard_romstage_entry(unsigned long bist) +void mainboard_romstage_entry(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); - report_bist_failure(bist); enable_smbus(); enable_pm(); -- cgit v1.2.3