From 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da Mon Sep 17 00:00:00 2001 From: Keith Hui Date: Sat, 22 Jul 2023 12:49:05 -0400 Subject: mb/*: Update SPD mapping for sandybridge boards Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree. Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping. Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72 Signed-off-by: Keith Hui Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967 Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/mainboard/asus/h61-series/devicetree.cb | 1 + src/mainboard/asus/h61-series/variants/h61m-cs/early_init.c | 7 ------- src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c | 8 -------- .../asus/h61-series/variants/p8h61-m_lx3_r2_0/early_init.c | 7 ------- src/mainboard/asus/h61-series/variants/p8h61-m_pro/early_init.c | 7 ------- .../asus/h61-series/variants/p8h61-m_pro_cm6630/early_init.c | 7 ------- .../asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb | 1 + 7 files changed, 2 insertions(+), 36 deletions(-) (limited to 'src/mainboard/asus/h61-series') diff --git a/src/mainboard/asus/h61-series/devicetree.cb b/src/mainboard/asus/h61-series/devicetree.cb index e1fe7c240f..cde04317f0 100644 --- a/src/mainboard/asus/h61-series/devicetree.cb +++ b/src/mainboard/asus/h61-series/devicetree.cb @@ -1,6 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/sandybridge + register "spd_addresses" = "{0x50, 0, 0x52, 0}" device domain 0 on device ref host_bridge on end # Host bridge device ref peg10 on end # PEG diff --git a/src/mainboard/asus/h61-series/variants/h61m-cs/early_init.c b/src/mainboard/asus/h61-series/variants/h61m-cs/early_init.c index cb8daaf014..50e225a0d4 100644 --- a/src/mainboard/asus/h61-series/variants/h61m-cs/early_init.c +++ b/src/mainboard/asus/h61-series/variants/h61m-cs/early_init.c @@ -2,7 +2,6 @@ #include #include -#include #include #include #include @@ -35,9 +34,3 @@ void bootblock_mainboard_early_init(void) pnp_write_config(ACPI_DEV, 0xe4, 0x10); nuvoton_pnp_exit_conf_state(SIO_DEV); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c index 5e54d08e85..5f5c684aa2 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c @@ -1,8 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include -#include -#include #include #include #include @@ -30,9 +28,3 @@ void bootblock_mainboard_early_init(void) { nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/early_init.c b/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/early_init.c index 33efaf6e04..404a8503bf 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/early_init.c +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/early_init.c @@ -2,7 +2,6 @@ #include #include -#include #include #include #include @@ -47,9 +46,3 @@ void bootblock_mainboard_early_init(void) /* Do not enable UART, the header is not populated by default */ } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_pro/early_init.c b/src/mainboard/asus/h61-series/variants/p8h61-m_pro/early_init.c index 05e87c1c68..1c8d84442b 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_pro/early_init.c +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_pro/early_init.c @@ -2,7 +2,6 @@ #include #include -#include #include #include #include @@ -49,9 +48,3 @@ void bootblock_mainboard_early_init(void) nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/early_init.c b/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/early_init.c index af90702cfe..e76e1094cb 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/early_init.c +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/early_init.c @@ -2,7 +2,6 @@ #include #include -#include #include #include #include @@ -49,9 +48,3 @@ void bootblock_mainboard_early_init(void) /* Enable UART */ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x51, id_only); - read_spd(&spd[2], 0x53, id_only); -} diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb index 7882bf0748..1b78b9b9bd 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/overridetree.cb @@ -1,6 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-or-later chip northbridge/intel/sandybridge + register "spd_addresses" = "{0x51, 0, 0x53, 0}" device domain 0 on chip southbridge/intel/bd82x6x register "gen1_dec" = "0x000c0291" # HWM -- cgit v1.2.3