From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/asus/f2a85-m/BiosCallOuts.c | 4 ++-- src/mainboard/asus/f2a85-m/OemCustomize.c | 8 ++++---- src/mainboard/asus/f2a85-m/acpi/routing.asl | 2 +- src/mainboard/asus/f2a85-m/buildOpts.c | 2 +- src/mainboard/asus/f2a85-m/romstage.c | 6 +++--- 5 files changed, 11 insertions(+), 11 deletions(-) (limited to 'src/mainboard/asus/f2a85-m') diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c index 45e174c922..9e60ca758a 100644 --- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c @@ -39,7 +39,7 @@ const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); * Copied from `/sys/class/sound/hwC1D0/init_pin_configs` when running * the vendor BIOS. */ -#if !IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_LE) +#if !CONFIG(BOARD_ASUS_F2A85_M_LE) const CODEC_ENTRY f2a85_m_alc887_VerbTbl[] = { {0x11, 0x99430140}, {0x12, 0x411111f0}, @@ -85,7 +85,7 @@ static const CODEC_TBL_LIST CodecTableList[] = void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) { - FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE); + FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); } void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env) diff --git a/src/mainboard/asus/f2a85-m/OemCustomize.c b/src/mainboard/asus/f2a85-m/OemCustomize.c index 9d96753298..ec79fc832b 100644 --- a/src/mainboard/asus/f2a85-m/OemCustomize.c +++ b/src/mainboard/asus/f2a85-m/OemCustomize.c @@ -134,8 +134,8 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = { void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) { FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface; - FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); - FchReset->Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE); + FchReset->Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE); + FchReset->Xhci1Enable = CONFIG(HUDSON_XHCI_ENABLE); } void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) @@ -179,9 +179,9 @@ static CONST PSO_ENTRY ROMDATA MemoryTable_M_LE[] = { void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) { - if (IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M) || IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_PRO)) + if (CONFIG(BOARD_ASUS_F2A85_M) || CONFIG(BOARD_ASUS_F2A85_M_PRO)) InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *) MemoryTable_M; - else if (IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_LE)) + else if (CONFIG(BOARD_ASUS_F2A85_M_LE)) InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *) MemoryTable_M_LE; } diff --git a/src/mainboard/asus/f2a85-m/acpi/routing.asl b/src/mainboard/asus/f2a85-m/acpi/routing.asl index af8532fdc7..c0aef87a15 100644 --- a/src/mainboard/asus/f2a85-m/acpi/routing.asl +++ b/src/mainboard/asus/f2a85-m/acpi/routing.asl @@ -46,7 +46,7 @@ /* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */ /* Bus 0, Dev 8 - Southbridge port (normally hidden) */ -#if IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_PRO) +#if CONFIG(BOARD_ASUS_F2A85_M_PRO) Package(){0x000FFFFF, 0, INTA, 0 }, Package(){0x000FFFFF, 1, INTB, 0 }, Package(){0x000FFFFF, 2, INTC, 0 }, diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c index e69564ea8e..dc20dc7dd8 100644 --- a/src/mainboard/asus/f2a85-m/buildOpts.c +++ b/src/mainboard/asus/f2a85-m/buildOpts.c @@ -167,7 +167,7 @@ #define BLDCFG_LVDS_POWER_ON_SEQ_VARY_BL_TO_BLON 3 #define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3 -#if IS_ENABLED(CONFIG_GFXUMA) +#if CONFIG(GFXUMA) #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index bed5a731cf..dffb726dc6 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -70,9 +70,9 @@ void board_BeforeAgesa(struct sysinfo *cb) u8 byte; pci_devfn_t dev; - if (IS_ENABLED(CONFIG_POST_DEVICE_PCI_PCIE)) + if (CONFIG(POST_DEVICE_PCI_PCIE)) hudson_pci_port80(); - else if (IS_ENABLED(CONFIG_POST_DEVICE_LPC)) + else if (CONFIG(POST_DEVICE_LPC)) hudson_lpc_port80(); /* enable SIO LPC decode */ @@ -95,7 +95,7 @@ void board_BeforeAgesa(struct sysinfo *cb) /* enable SIO clock */ sbxxx_enable_48mhzout(); - if (IS_ENABLED(CONFIG_BOARD_ASUS_F2A85_M_PRO)) + if (CONFIG(BOARD_ASUS_F2A85_M_PRO)) superio_init_m_pro(); else superio_init_m(); -- cgit v1.2.3