From f29200240e428761827ab8d179fa23068bfa9d59 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 27 Apr 2014 00:41:50 +1000 Subject: superio/ite/*: Factor out generic romstage component Following the reasoning of: cf7b498 superio/fintek/*: Factor out generic romstage component Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5585 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek --- src/mainboard/asus/f2a85-m/romstage.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/mainboard/asus/f2a85-m/romstage.c') diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 4aa4b04e4a..487f0684a1 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -36,16 +36,19 @@ #include #include #include +#include +#include /* TODO: remove .c includes */ #include #include -#include #define MMIO_NON_POSTED_START 0xfed00000 #define MMIO_NON_POSTED_END 0xfedfffff #define SB_MMIO 0xFED80000 #define SB_MMIO_MISC32(x) *(volatile u32 *)(SB_MMIO + 0xE00 + (x)) +#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) + static void sbxxx_enable_48mhzout(void) { /* most likely programming to 48MHz out signal */ @@ -95,7 +98,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* enable SIO clock */ sbxxx_enable_48mhzout(); it8712f_kill_watchdog(); - it8712f_enable_serial(0, CONFIG_TTYS0_BASE); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); it8712f_enable_3vsbsw(); console_init(); -- cgit v1.2.3