From fa02e16c7651a453702192e5a4c8f47f3d372b94 Mon Sep 17 00:00:00 2001
From: Idwer Vollering <vidwer@gmail.com>
Date: Sat, 29 Mar 2014 13:13:10 +0100
Subject: asus/f2a85-m: Sanitize #includes

Based on the same reasoning as this commit:
1d87dac hp/pavilion_m6_1035dx: Sanitize #includes

Change-Id: I383f79b5392ee1ca244e403f755213fa7b32c0af
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: http://review.coreboot.org/5420
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
---
 src/mainboard/asus/f2a85-m/buildOpts.c | 43 ++++++++++++++--------------------
 1 file changed, 17 insertions(+), 26 deletions(-)

(limited to 'src/mainboard/asus/f2a85-m/buildOpts.c')

diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index 0091cd9463..cbd1071903 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -33,9 +33,21 @@
  * @e \$Revision: 23714 $   @e \$Date: 2009-12-09 17:28:37 -0600 (Wed, 09 Dec 2009) $
  */
 
-#include "AGESA.h"
-//#include "CommonReturns.h"
-#include "Filecode.h"
+#include <vendorcode/amd/agesa/f15tn/AGESA.h>
+
+/*  Include the files that instantiate the configuration definitions.  */
+#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
+#include <vendorcode/amd/agesa/f15tn/Include/CommonReturns.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
+/* the next two headers depend on heapManager.h */
+#include <vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h>
+/* These tables are optional and may be used to adjust memory timing settings */
+#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
+#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
+
 #define FILECODE PLATFORM_SPECIFIC_OPTIONS_FILECODE
 
 /*  Select the cpu family.  */
@@ -251,22 +263,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
 
 #define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
 
-//#include  "VirgoInstall.h"
-
-/*  Include the files that instantiate the configuration definitions.  */
-#include "cpuRegisters.h"
-#include "cpuFamRegisters.h"
-#include "cpuFamilyTranslation.h"
-#include "AdvancedApi.h"
-#include "heapManager.h"
-#include "CreateStruct.h"
-#include "cpuFeatures.h"
-#include "Table.h"
-#include "CommonReturns.h"
-#include "cpuEarlyInit.h"
-#include "cpuLateInit.h"
-#include "GnbInterface.h"
-
                   // This is the delivery package title, "BrazosPI"
                   // This string MUST be exactly 8 characters long
 #define AGESA_PACKAGE_STRING  {'c', 'b', '_', 'A', 'g', 'e', 's', 'a'}
@@ -364,7 +360,8 @@ GPIO_CONTROL   f2a85_m_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+/* Moving this include up will break AGESA. */
+#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
 
 /*----------------------------------------------------------------------------------------
  *                        CUSTOMER OVERIDES MEMORY TABLE
@@ -451,12 +448,6 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
   PSO_END
 };
 
-/*
- * These tables are optional and may be used to adjust memory timing settings
- */
-#include "mm.h"
-#include "mn.h"
-
 // Customer table
 UINT8 AGESA_MEM_TABLE_TN[][sizeof (MEM_TABLE_ALIAS)] =
 {
-- 
cgit v1.2.3