From ffa710b9dd241cc7545858a2ac69f7cdb214cddf Mon Sep 17 00:00:00 2001 From: Balazs Vinarz Date: Fri, 18 Jan 2019 10:53:13 +0100 Subject: mb/asus: Add Asus A88XM-E FM2+ with documentation The port is based on the F2A85-M, the main differences are: - 2 DDR3 dimms - 2 PS/2 ports - 2*USB2.0 and 2*USB3.0 ports - 3+2 phase VRM - 6 channel audio - 6 SATA ports - ASP1206 VRM controller - Bolton D4 chipset - no optical SPDIF/IO Successfully booted configurations: -RAM: 2*8GB Kingston KVR 1333Mhz LP, 2*8GB Crucial BLT8G3D1869DT1TX0 -CPU: AMD A8-6500 (Richland), AMD A10-6700 (Richland) -OS: Arch Linux 4.19 (SATA, USB), Linux Mint 19.3, Artix Linux 2019 -SeaBIOS: 1.12 and 1.13 Known problems: - IRQ routing is done incorrect way - common problem of fam15h boards - Windows 7 can't boot because of the incomplete ACPI implementation Change-Id: I60fa0636ba41f5f1a6a3faa2764bf2f0a968cf90 Signed-off-by: Balazs Vinarz Reviewed-on: https://review.coreboot.org/c/coreboot/+/30987 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/asus/a88xm-e/bootblock.c | 38 ++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 src/mainboard/asus/a88xm-e/bootblock.c (limited to 'src/mainboard/asus/a88xm-e/bootblock.c') diff --git a/src/mainboard/asus/a88xm-e/bootblock.c b/src/mainboard/asus/a88xm-e/bootblock.c new file mode 100644 index 0000000000..0bc8d2e15e --- /dev/null +++ b/src/mainboard/asus/a88xm-e/bootblock.c @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +static void sbxxx_enable_48mhzout(void) +{ + /* Set auxiliary output clock frequency on OSCOUT2 pin to be 48MHz */ + u32 reg32; + reg32 = misc_read32(0x28); + reg32 &= ~(7 << 19); + reg32 |= (2 << 19); + misc_write32(0x28, reg32); + + /* Enable Auxiliary OSCOUT2 */ + misc_write32(0x40, misc_read32(0x40) & ~(1 << 7)); +} + +static void superio_init_m(void) +{ + const pnp_devfn_t uart = PNP_DEV(0x2e, IT8728F_SP1); + const pnp_devfn_t gpio = PNP_DEV(0x2e, IT8728F_GPIO); + + ite_kill_watchdog(gpio); + ite_enable_serial(uart, CONFIG_TTYS0_BASE); + ite_enable_3vsbsw(gpio); +} + +void bootblock_mainboard_early_init(void) +{ + /* enable SIO clock */ + sbxxx_enable_48mhzout(); + + superio_init_m(); +} -- cgit v1.2.3