From fb2f667da2091ce2194274f95c2d5db024d46e63 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 28 Mar 2017 11:50:10 +0200 Subject: nb/amd/amdk8: Link raminit_f.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For this debug.c needs to be linked too. Change-Id: I9cd1ffff2c39021693fe1d5d3f90ec5f70891f57 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19030 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/asrock/939a785gmh/romstage.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'src/mainboard/asrock') diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index 0894af9e53..1894fdefb9 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -34,7 +34,6 @@ #include "northbridge/amd/amdk8/setup_resource_map.c" #include #include -#include "northbridge/amd/amdk8/debug.c" /* After sb700/early_setup.c! */ #include #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) @@ -42,10 +41,10 @@ unsigned get_sbdn(unsigned bus); -static void memreset(int controllers, const struct mem_controller *ctrl) { } -static void activate_spd_rom(const struct mem_controller *ctrl) { } +void memreset(int controllers, const struct mem_controller *ctrl) { } +void activate_spd_rom(const struct mem_controller *ctrl) { } -static inline int spd_read_byte(u32 device, u32 address) +int spd_read_byte(u32 device, u32 address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -- cgit v1.2.3