From c94d73e0e6703369831fe6d489a20d71ab2bb974 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Mon, 16 Jun 2014 17:24:14 +1000 Subject: mainboard: Clear up remaining SIO_PORT from Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Push back any board specific values back into romstage.c #defines and drop any remaining fragments of CONFIG_SIO_PORT in-tree. Change-Id: Ieb63fb0c2ab1a82b53bafd86686de7b21ac226c3 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/6045 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/asrock/e350m1/Kconfig | 4 ---- src/mainboard/asrock/e350m1/romstage.c | 2 +- 2 files changed, 1 insertion(+), 5 deletions(-) (limited to 'src/mainboard/asrock') diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index 956bb3ce5b..00cdaa735c 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -69,10 +69,6 @@ config RAMBASE hex default 0x200000 -config SIO_PORT - hex - default 0x2e - config ONBOARD_VGA_IS_PRIMARY bool default y diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index 2913c08da0..5c2f86747f 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -39,7 +39,7 @@ #include "SBPLATFORM.h" -#define SERIAL_DEV PNP_DEV(CONFIG_SIO_PORT, W83627HF_SP1) +#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { -- cgit v1.2.3