From 42fa7fe28b60b448f501e99ee285a0af12c86d34 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 20 Apr 2011 20:54:07 +0000 Subject: run uart_init() from console_init, just like the other console initialization functions. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/asrock/939a785gmh/romstage.c | 1 - src/mainboard/asrock/e350m1/romstage.c | 1 - 2 files changed, 2 deletions(-) (limited to 'src/mainboard/asrock') diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index 25822d9e56..b0ae24794f 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -158,7 +158,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sio_init(); w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index b48a58af6b..d63fbe81cb 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -53,7 +53,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x31); w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); } //reg8 = pmio_read(0x24); -- cgit v1.2.3