From 1aa35c6f6c2f3d3820d574579e929cbafd4304a7 Mon Sep 17 00:00:00 2001
From: Kyösti Mälkki <kyosti.malkki@gmail.com>
Date: Tue, 21 Oct 2014 14:19:04 +0300
Subject: AGESA: Trace execution with AGESA_EVENTLOG()
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Change-Id: I5601ed92ca808603b0a9edad118ca54aa168aceb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7604
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
---
 src/mainboard/asrock/e350m1/romstage.c   | 11 +++++------
 src/mainboard/asrock/imb-a180/romstage.c | 15 +++++++--------
 2 files changed, 12 insertions(+), 14 deletions(-)

(limited to 'src/mainboard/asrock')

diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index f297da68df..c7c71a1e96 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -31,7 +31,6 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/car.h>
 #include <northbridge/amd/agesa/agesawrapper.h>
-#include <northbridge/amd/agesa/agesawrapper_call.h>
 #include "cpu/x86/bist.h"
 #include <superio/nuvoton/common/nuvoton.h>
 #include <superio/nuvoton/nct5572d/nct5572d.h>
@@ -75,19 +74,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
 
 	post_code(0x35);
-	AGESAWRAPPER(amdinitmmio);
+	agesawrapper_amdinitmmio();
 
 	post_code(0x37);
-	AGESAWRAPPER(amdinitreset);
+	agesawrapper_amdinitreset();
 
 	post_code(0x39);
-	AGESAWRAPPER(amdinitearly);
+	agesawrapper_amdinitearly();
 
 	post_code(0x40);
-	AGESAWRAPPER(amdinitpost);
+	agesawrapper_amdinitpost();
 
 	post_code(0x41);
-	AGESAWRAPPER(amdinitenv);
+	agesawrapper_amdinitenv();
 
 	post_code(0x50);
 	copy_and_run();
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 24fa1944a3..3d1458bed1 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -31,7 +31,6 @@
 #include <console/loglevel.h>
 #include <cpu/amd/car.h>
 #include <northbridge/amd/agesa/agesawrapper.h>
-#include <northbridge/amd/agesa/agesawrapper_call.h>
 #include "cpu/x86/bist.h"
 #include "cpu/x86/lapic.h"
 #include "southbridge/amd/agesa/hudson/hudson.h"
@@ -56,7 +55,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	//outb(0xD2, 0xcd6);
 	//outb(0x00, 0xcd7);
 
-	AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
+	agesawrapper_amdinitmmio();
 
 	/* Set LPC decode enables. */
 	pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
@@ -105,29 +104,29 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		val = inb(0xcd6);
 
 	post_code(0x37);
-	AGESAWRAPPER(amdinitreset);
+	agesawrapper_amdinitreset();
 	post_code(0x38);
 	printk(BIOS_DEBUG, "Got past yangtze_early_setup\n");
 
 	post_code(0x39);
 
-	AGESAWRAPPER(amdinitearly);
+	agesawrapper_amdinitearly();
 	int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
 	if (!s3resume) {
 		post_code(0x40);
-		AGESAWRAPPER(amdinitpost);
+		agesawrapper_amdinitpost();
 		post_code(0x41);
-		AGESAWRAPPER(amdinitenv);
+		agesawrapper_amdinitenv();
 		/* TODO: Disable cache is not ok. */
 		disable_cache_as_ram();
 	} else { /* S3 detect */
 		printk(BIOS_INFO, "S3 detected\n");
 
 		post_code(0x60);
-		AGESAWRAPPER(amdinitresume);
+		agesawrapper_amdinitresume();
 
 		agesawrapper_amdinitcpuio();
-		AGESAWRAPPER(amds3laterestore);
+		agesawrapper_amds3laterestore();
 
 		post_code(0x61);
 		prepare_for_resume();
-- 
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