From d7bf3ad9397a367021e57d204438a178022aaa8c Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 3 Jul 2020 20:31:39 +0200 Subject: haswell: Compute disabled channel masks at runtime MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All mainboards have a non-zero SPD address to implemented DIMM slots. Knowing this, it is possible to compute the MRC slot population masks automatically instead of hardcoding the values on each mainboard. Change-Id: Ia8f369dd1228d53d64471e48700e870e01e77837 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43119 Reviewed-by: Tristan Corrick Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/mainboard/asrock/h81m-hds/romstage.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/mainboard/asrock/h81m-hds') diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index 7c7eec3509..16f7d0d1cf 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -27,14 +27,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[0] = 0xa0; pei_data->spd_addresses[2] = 0xa4; pei_data->ec_present = 0; - /* - * 0 = leave channel enabled - * 1 = disable dimm 0 on channel - * 2 = disable dimm 1 on channel - * 3 = disable dimm 0+1 on channel - */ - pei_data->dimm_channel0_disabled = 2; - pei_data->dimm_channel1_disabled = 2; pei_data->max_ddr3_freq = 1600; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { -- cgit v1.2.3