From a433da754ab42083d1885d60bb819a28728e3b29 Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Wed, 21 Aug 2019 16:29:07 +0300 Subject: mb/asrock/h110m: disable unused serial buses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Disable spi0, i2c0 and i2c1 in the “SerialIoDevMode” register for the following reasons: 1. when the AMI BIOS is used, these pci devices are disabled in lspci.log; 2. there are no pads in the inteltool.log that use the functions of these buses Change-Id: I01ab10eb3fd41e81a1726805247c2b472d72287c Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/35070 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/asrock/h110m/devicetree.cb | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/asrock/h110m') diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 60a3aaa0c4..47d534a99b 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -190,13 +190,13 @@ chip soc/intel/skylake # PCH UART, SPI, I2C register "SerialIoDevMode" = "{ \ - [PchSerialIoIndexI2C0] = PchSerialIoPci, \ - [PchSerialIoIndexI2C1] = PchSerialIoPci, \ + [PchSerialIoIndexI2C0] = PchSerialIoDisabled, \ + [PchSerialIoIndexI2C1] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C2] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C3] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C4] = PchSerialIoDisabled, \ [PchSerialIoIndexI2C5] = PchSerialIoDisabled, \ - [PchSerialIoIndexSpi0] = PchSerialIoPci, \ + [PchSerialIoIndexSpi0] = PchSerialIoDisabled, \ [PchSerialIoIndexSpi1] = PchSerialIoDisabled, \ [PchSerialIoIndexUart0] = PchSerialIoDisabled, \ [PchSerialIoIndexUart1] = PchSerialIoDisabled, \ -- cgit v1.2.3