From 33b59c9170a66a7f6d9c26ccf664714ea81d218d Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 11 Feb 2021 13:42:20 +0100 Subject: haswell: Drop `mainboard_fill_pei_data` Use global variables to provide mainboard USB settings, and have the northbridge code copy it into the `pei_data` struct. For now. To minimize diffstat noise, this patch does not reindent the now-global mainboard USB configuration arrays. This is cleaned up in a follow-up. Change-Id: I273c7a6cd46734ae25b95fc11b5e188d63cac32e Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50538 Reviewed-by: Arthur Heymans Reviewed-by: HAOUAS Elyes Tested-by: build bot (Jenkins) --- src/mainboard/asrock/b85m_pro4/romstage.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) (limited to 'src/mainboard/asrock/b85m_pro4') diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c index 119d007cf1..16f3d0a8a4 100644 --- a/src/mainboard/asrock/b85m_pro4/romstage.c +++ b/src/mainboard/asrock/b85m_pro4/romstage.c @@ -25,9 +25,7 @@ void mb_get_spd_map(uint8_t spd_map[4]) spd_map[3] = 0xa6; } -void mainboard_fill_pei_data(struct pei_data *pei_data) -{ - struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { + const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, { 0x0040, 1, 0, USB_PORT_BACK_PANEL }, @@ -45,7 +43,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { 0x0040, 1, 6, USB_PORT_BACK_PANEL }, }; - struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = { + const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = { { 1, 0 }, { 1, 0 }, { 1, 1 }, @@ -53,7 +51,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) { 1, 2 }, { 1, 2 }, }; - - memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports)); - memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports)); -} -- cgit v1.2.3