From ff4025c5f789b80e6552dd887c34c34642a98c64 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 14 Jan 2018 12:34:43 +0100 Subject: sb/intel/bd82x6x: Reduce function-disable mess MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Most affected boards set the function disabled (FD) register to an arbitrary state dumped from systems running the vendor BIOS. This makes it impossible to enable the devices in devicetree and a pretty big mess of course because nobody cared to keep the register in sync with the devicetree. To get completely rid of most of the writes to FD, move setting of PCH_DISABLE_ALWAYS into the southbridge code where it belongs. Change-Id: Ia2a507cbcdf218d09738e2e16f0d3ad1dcf57b8b Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/23255 Tested-by: build bot (Jenkins) Reviewed-by: Hal Martin Reviewed-by: Stefan Reinauer Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel Reviewed-by: Bill XIE Reviewed-by: Arthur Heymans --- src/mainboard/asrock/b75pro3-m/romstage.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/asrock/b75pro3-m') diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c index f556443e96..645fd0800c 100644 --- a/src/mainboard/asrock/b75pro3-m/romstage.c +++ b/src/mainboard/asrock/b75pro3-m/romstage.c @@ -27,9 +27,8 @@ void pch_enable_lpc(void) pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0000); } -void rcba_config(void) +void mainboard_rcba_config(void) { - RCBA32(FD) = PCH_DISABLE_ALWAYS | 0x10001fe0; } const struct southbridge_usb_port mainboard_usb_ports[] = { -- cgit v1.2.3