From e0afe735a0fa0564a9ab082593c60f56c291493a Mon Sep 17 00:00:00 2001 From: Warren Turkal Date: Mon, 27 Sep 2010 21:18:26 +0000 Subject: All these boards already had the CACHE_AS_RAM option in their individual configs. I just moved it the the CPU that they all use. Signed-off-by: Warren Turkal Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/artecgroup/dbe61/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/artecgroup/dbe61') diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig index 9dfb0ca72a..52669294f7 100644 --- a/src/mainboard/artecgroup/dbe61/Kconfig +++ b/src/mainboard/artecgroup/dbe61/Kconfig @@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_PIRQ_TABLE select PIRQ_ROUTE select UDELAY_TSC - select CACHE_AS_RAM select BOARD_ROMSIZE_KB_256 config MAINBOARD_DIR -- cgit v1.2.3