From 142b52cd322ff69afe974f90a446f62b193d120c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 10 Dec 2013 07:33:36 +0200 Subject: AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ib3a69e3364418426438f88ba14e5cf744e2414fa Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/4524 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Bruce Griffith Reviewed-by: Paul Menzel --- src/mainboard/arima/hdama/romstage.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/mainboard/arima') diff --git a/src/mainboard/arima/hdama/romstage.c b/src/mainboard/arima/hdama/romstage.c index 191927d63e..3c7eb585a5 100644 --- a/src/mainboard/arima/hdama/romstage.c +++ b/src/mainboard/arima/hdama/romstage.c @@ -59,7 +59,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" -#include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) -- cgit v1.2.3