From a513995faba4959c3a7a11123bf57b42857659a4 Mon Sep 17 00:00:00 2001 From: Evgeny Zinoviev Date: Fri, 10 May 2019 02:04:59 +0300 Subject: mb/apple: Add MacBook Pro 10,1 (A1398) support MacBook Pro 15 (Mid 2012/Early 2013) with Ivy Bridge CPU and Retina Display. Not all RAM configurations are supported at the monent, see comment in early_init.c. Used autoported config as a template. Change-Id: Ica03aba442493c0d369a3d360ad569ddc16954df Signed-off-by: Evgeny Zinoviev --- src/mainboard/apple/macbookpro10_1/Kconfig | 45 ++++ src/mainboard/apple/macbookpro10_1/Kconfig.name | 2 + src/mainboard/apple/macbookpro10_1/Makefile.inc | 9 + src/mainboard/apple/macbookpro10_1/acpi/ec.asl | 11 + .../apple/macbookpro10_1/acpi/platform.asl | 10 + .../apple/macbookpro10_1/acpi/superio.asl | 0 src/mainboard/apple/macbookpro10_1/acpi_tables.c | 13 ++ src/mainboard/apple/macbookpro10_1/board_info.txt | 6 + src/mainboard/apple/macbookpro10_1/cmos.default | 4 + src/mainboard/apple/macbookpro10_1/cmos.layout | 76 +++++++ src/mainboard/apple/macbookpro10_1/devicetree.cb | 75 +++++++ src/mainboard/apple/macbookpro10_1/dsdt.asl | 27 +++ src/mainboard/apple/macbookpro10_1/early_init.c | 105 ++++++++++ .../apple/macbookpro10_1/gma-mainboard.ads | 21 ++ src/mainboard/apple/macbookpro10_1/gpio.c | 231 +++++++++++++++++++++ src/mainboard/apple/macbookpro10_1/hda_verb.c | 26 +++ src/mainboard/apple/macbookpro10_1/mainboard.c | 18 ++ .../apple/macbookpro10_1/spd/2g_hynix_1600.spd.hex | 16 ++ .../apple/macbookpro10_1/spd/4g_hynix_1600.spd.hex | 16 ++ .../apple/macbookpro10_1/spd/Makefile.inc | 4 + 20 files changed, 715 insertions(+) create mode 100644 src/mainboard/apple/macbookpro10_1/Kconfig create mode 100644 src/mainboard/apple/macbookpro10_1/Kconfig.name create mode 100644 src/mainboard/apple/macbookpro10_1/Makefile.inc create mode 100644 src/mainboard/apple/macbookpro10_1/acpi/ec.asl create mode 100644 src/mainboard/apple/macbookpro10_1/acpi/platform.asl create mode 100644 src/mainboard/apple/macbookpro10_1/acpi/superio.asl create mode 100644 src/mainboard/apple/macbookpro10_1/acpi_tables.c create mode 100644 src/mainboard/apple/macbookpro10_1/board_info.txt create mode 100644 src/mainboard/apple/macbookpro10_1/cmos.default create mode 100644 src/mainboard/apple/macbookpro10_1/cmos.layout create mode 100644 src/mainboard/apple/macbookpro10_1/devicetree.cb create mode 100644 src/mainboard/apple/macbookpro10_1/dsdt.asl create mode 100644 src/mainboard/apple/macbookpro10_1/early_init.c create mode 100644 src/mainboard/apple/macbookpro10_1/gma-mainboard.ads create mode 100644 src/mainboard/apple/macbookpro10_1/gpio.c create mode 100644 src/mainboard/apple/macbookpro10_1/hda_verb.c create mode 100644 src/mainboard/apple/macbookpro10_1/mainboard.c create mode 100644 src/mainboard/apple/macbookpro10_1/spd/2g_hynix_1600.spd.hex create mode 100644 src/mainboard/apple/macbookpro10_1/spd/4g_hynix_1600.spd.hex create mode 100644 src/mainboard/apple/macbookpro10_1/spd/Makefile.inc (limited to 'src/mainboard/apple') diff --git a/src/mainboard/apple/macbookpro10_1/Kconfig b/src/mainboard/apple/macbookpro10_1/Kconfig new file mode 100644 index 0000000000..d86a6589f2 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/Kconfig @@ -0,0 +1,45 @@ +if BOARD_APPLE_MACBOOKPRO10_1 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select BOARD_ROMSIZE_KB_8192 + select DRIVERS_APPLE_HYBRID_GRAPHICS + select EC_ACPI + select GFX_GMA_PANEL_1_ON_EDP + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select HAVE_CMOS_DEFAULT + select HAVE_OPTION_TABLE + select HAVE_SPD_IN_CBFS + select INTEL_INT15 + select MAINBOARD_HAS_LIBGFXINIT + select NORTHBRIDGE_INTEL_SANDYBRIDGE + select SERIRQ_CONTINUOUS_MODE + select SOUTHBRIDGE_INTEL_C216 + select SYSTEM_TYPE_LAPTOP + select USE_NATIVE_RAMINIT + +config MAINBOARD_DIR + string + default apple/macbookpro10_1 + +config MAINBOARD_PART_NUMBER + string + default "MacBookPro10,1" + +config VGA_BIOS_ID + string + default "8086,0166" + +config DRAM_RESET_GATE_GPIO + int + default 28 + +config USBDEBUG_HCD_INDEX + int + default 0 + +config MAX_CPUS + int + default 8 +endif diff --git a/src/mainboard/apple/macbookpro10_1/Kconfig.name b/src/mainboard/apple/macbookpro10_1/Kconfig.name new file mode 100644 index 0000000000..c257f7a4fe --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_APPLE_MACBOOKPRO10_1 + bool "MacBookPro10,1" diff --git a/src/mainboard/apple/macbookpro10_1/Makefile.inc b/src/mainboard/apple/macbookpro10_1/Makefile.inc new file mode 100644 index 0000000000..b17091ea4a --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/Makefile.inc @@ -0,0 +1,9 @@ +romstage-y += gpio.c +romstage-y += early_init.c + +bootblock-y += gpio.c +bootblock-y += early_init.c + +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads + +subdirs-y += spd diff --git a/src/mainboard/apple/macbookpro10_1/acpi/ec.asl b/src/mainboard/apple/macbookpro10_1/acpi/ec.asl new file mode 100644 index 0000000000..9e61b4b988 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/acpi/ec.asl @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#define LIDS_OFFSET 0x60 +#define HPAC_OFFSET 0x60 +#define WKLD_OFFSET 0x68 + +#include +#include +#include + +#include diff --git a/src/mainboard/apple/macbookpro10_1/acpi/platform.asl b/src/mainboard/apple/macbookpro10_1/acpi/platform.asl new file mode 100644 index 0000000000..a56d3190bd --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/acpi/platform.asl @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Method(_WAK,1) +{ + Return(Package(){0,0}) +} + +Method(_PTS,1) +{ +} diff --git a/src/mainboard/apple/macbookpro10_1/acpi/superio.asl b/src/mainboard/apple/macbookpro10_1/acpi/superio.asl new file mode 100644 index 0000000000..e69de29bb2 diff --git a/src/mainboard/apple/macbookpro10_1/acpi_tables.c b/src/mainboard/apple/macbookpro10_1/acpi_tables.c new file mode 100644 index 0000000000..ad1295b6b3 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/acpi_tables.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +void mainboard_fill_gnvs(struct global_nvs *gnvs) +{ + /* The lid is open by default. */ + gnvs->lids = 1; + + gnvs->tcrt = 100; + gnvs->tpsv = 90; +} diff --git a/src/mainboard/apple/macbookpro10_1/board_info.txt b/src/mainboard/apple/macbookpro10_1/board_info.txt new file mode 100644 index 0000000000..c916715bed --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/board_info.txt @@ -0,0 +1,6 @@ +Category: laptop +ROM protocol: SPI +Flashrom support: y +ROM package: SOIC-8 +ROM socketed: n +Release year: 2012 diff --git a/src/mainboard/apple/macbookpro10_1/cmos.default b/src/mainboard/apple/macbookpro10_1/cmos.default new file mode 100644 index 0000000000..d0e926c952 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/cmos.default @@ -0,0 +1,4 @@ +debug_level=Debug +hybrid_graphics_mode=Integrated Only +gfx_uma_size=32M +me_state=Normal diff --git a/src/mainboard/apple/macbookpro10_1/cmos.layout b/src/mainboard/apple/macbookpro10_1/cmos.layout new file mode 100644 index 0000000000..4172d68834 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/cmos.layout @@ -0,0 +1,76 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 6 debug_level + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail + +# coreboot config options: ME +425 1 e 13 me_state +426 2 h 0 me_state_prev + +# coreboot config options: northbridge +432 3 e 11 gfx_uma_size +435 2 e 12 hybrid_graphics_mode + +# SandyBridge MRC Scrambler Seed values +896 32 r 0 mrc_scrambler_seed +928 32 r 0 mrc_scrambler_seed_s3 +960 16 r 0 mrc_scrambler_seed_chk + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep +11 0 32M +11 1 64M +11 2 96M +11 3 128M +11 4 160M +11 5 192M +11 6 224M +12 0 Integrated Only +12 1 Discrete Only +13 0 Normal +13 1 Disabled + +# ----------------------------------------------------------------- +checksums + +checksum 392 447 984 diff --git a/src/mainboard/apple/macbookpro10_1/devicetree.cb b/src/mainboard/apple/macbookpro10_1/devicetree.cb new file mode 100644 index 0000000000..0a5a395ec9 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/devicetree.cb @@ -0,0 +1,75 @@ +chip northbridge/intel/sandybridge + register "gfx.ndid" = "3" + register "gfx.use_spread_spectrum_clock" = "1" + register "gpu_cpu_backlight" = "0x0000021c" + register "gpu_dp_b_hotplug" = "7" + register "gpu_dp_c_hotplug" = "7" + register "gpu_dp_d_hotplug" = "7" + register "gpu_panel_port_select" = "1" + register "gpu_panel_power_backlight_off_delay" = "2000" + register "gpu_panel_power_backlight_on_delay" = "2000" + register "gpu_panel_power_cycle_delay" = "5" + register "gpu_panel_power_down_delay" = "500" + register "gpu_panel_power_up_delay" = "600" + register "gpu_pch_backlight" = "0x021c0000" + + device cpu_cluster 0 on + chip cpu/intel/model_206ax + device lapic 0 on end + device lapic 0xacac off end + end + end + + device domain 0 on + subsystemid 0x106b 0x00f7 inherit + device pci 00.0 on end # Host bridge + device pci 01.0 on end # PCIe Bridge for discrete graphics + device pci 01.2 on end + device pci 01.1 on end + device pci 02.0 on end # Internal graphics VGA controller + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "c2_latency" = "0x0065" + register "gen1_dec" = "0x000c0681" + register "gen2_dec" = "0x000c1641" + register "gen3_dec" = "0x001c0301" + register "gen4_dec" = "0x00fc0701" + register "gpi7_routing" = "2" + register "pcie_port_coalesce" = "1" + register "sata_interface_speed_support" = "0x3" + register "sata_port_map" = "0x1" + register "spi_lvscc" = "0x0" + register "spi_uvscc" = "0x2005" + register "superspeed_capable_ports" = "0x0000000f" + register "xhci_overcurrent_mapping" = "0x08040201" + register "xhci_switchable_ports" = "0x0000000f" + device pci 14.0 on end # USB 3.0 Controller + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 19.0 off end # Intel Gigabit Ethernet + device pci 1a.0 on end # USB2 EHCI #2 + device pci 1b.0 on end # HD Audio controller + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 on end # PCIe Port #2 + device pci 1c.2 off end # PCIe Port #3 + device pci 1c.3 off end # PCIe Port #4 + device pci 1c.4 off end # PCIe Port #5 + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 off end # PCIe Port #7 + device pci 1c.7 off end # PCIe Port #8 + device pci 1d.0 on end # USB2 EHCI #1 + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on # LPC bridge + chip drivers/apple/hybrid_graphics + device pnp ff.f on end # dummy + register "gmux_indexed" = "1" + end + end + device pci 1f.2 on end # SATA Controller 1 + device pci 1f.3 on end # SMBus + device pci 1f.5 off end # SATA Controller 2 + device pci 1f.6 off end # Thermal + end + end +end diff --git a/src/mainboard/apple/macbookpro10_1/dsdt.asl b/src/mainboard/apple/macbookpro10_1/dsdt.asl new file mode 100644 index 0000000000..fe72d28be0 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/dsdt.asl @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20141018 // OEM revision +) +{ + #include + #include "acpi/platform.asl" + #include + #include + /* global NVS and variables. */ + #include + #include + + Device (\_SB.PCI0) + { + #include + #include + #include + } +} diff --git a/src/mainboard/apple/macbookpro10_1/early_init.c b/src/mainboard/apple/macbookpro10_1/early_init.c new file mode 100644 index 0000000000..39596fd827 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/early_init.c @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, 0 }, /* Ext A (XHCI/EHCI) */ + { 1, 0, 1 }, /* Ext B (XHCI) */ + { 1, 0, 2 }, /* Ext C (XHCI/EHCI) */ + { 1, 0, 3 }, /* Ext D (XHCI) */ + { 0, 0, -1 }, /* Unused */ + { 1, 0, -1 }, /* SD */ + { 1, 0, -1 }, /* Wi-Fi */ + { 1, 0, -1 }, /* USB Hub (All LS/FS Devices) */ + { 1, 0, -1 }, /* Camera */ + { 1, 0, 4 }, /* Ext B (EHCI) */ + { 1, 0, 5 }, /* Ext D (EHCI) */ + { 1, 0, -1 }, /* BT */ + { 0, 0, -1 }, /* Unused */ + { 0, 0, -1 }, /* Unused */ +}; + +void mainboard_early_init(int s3resume) +{ + bool igd, peg; + u32 reg32; + + early_hybrid_graphics(&igd, &peg); + + /* Hide disabled devices */ + reg32 = pci_read_config32(HOST_BRIDGE, DEVEN); + reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD); + + if (peg) + reg32 |= DEVEN_PEG10; + + if (igd) { + reg32 |= DEVEN_IGD; + } else { + /* Disable IGD VGA decode, no GTT or GFX stolen */ + pci_write_config16(HOST_BRIDGE, GGC, 2); + } + + pci_write_config32(HOST_BRIDGE, DEVEN, reg32); +} + +static uint8_t *get_spd_data(int spd_index) +{ + uint8_t *spd_file; + size_t spd_file_len; + + printk(BIOS_DEBUG, "spd index %d\n", spd_index); + spd_file = cbfs_map("spd.bin", &spd_file_len); + if (!spd_file) + die("SPD data not found."); + + if (spd_file_len < spd_index * 256) + die("Missing SPD data."); + + return spd_file + spd_index * 256; +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + uint8_t *memory; + const int spd_gpio_vector[] = {71, 70, 69, 68, -1}; + int ramcfg = get_gpios(spd_gpio_vector); + int spd_index = -1; + + /* + * GPIO68 GPIO69 GPIO70 GPIO71 Memory Supported + * 0 0 0 0 4G Hynix 1600S No + * 0 0 0 1 1G Samsung 1600 No + * 0 0 1 0 4G Samsung 1600S No + * 0 0 1 1 1G Hynix 1600 No + * 0 1 0 0 4G Elpida 1600S No + * 0 1 0 1 2G Samsung 1600 No + * 0 1 1 0 2G Samsung 1333 No + * 0 1 1 1 2G Hynix 1600 Yes + * 1 0 0 0 4G Samsung 1600 No + * 1 0 0 1 4G Hynix 1600 Yes + * 1 0 1 0 2G Elpida 1600S No + * 1 0 1 1 2G Elpida 1600 No + * 1 1 0 0 4G Elpida 1600 No + * 1 1 0 1 2G Samsung 1600S No + * 1 1 1 0 2G Hynix 1600S No + */ + + if (ramcfg == 7) + spd_index = 0; + else if (ramcfg == 9) + spd_index = 1; + + if (spd_index == -1) + die("Unsupported memory, RAMCFG=%d\n", ramcfg); + + memory = get_spd_data(spd_index); + memcpy(&spd[0], memory, 256); + memcpy(&spd[2], memory, 256); +} diff --git a/src/mainboard/apple/macbookpro10_1/gma-mainboard.ads b/src/mainboard/apple/macbookpro10_1/gma-mainboard.ads new file mode 100644 index 0000000000..0cf02cd3b2 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/gma-mainboard.ads @@ -0,0 +1,21 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, + DP2, + DP3, + HDMI1, + HDMI2, + HDMI3, + eDP, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/apple/macbookpro10_1/gpio.c b/src/mainboard/apple/macbookpro10_1/gpio.c new file mode 100644 index 0000000000..cec289e339 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/gpio.c @@ -0,0 +1,231 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_GPIO, + .gpio3 = GPIO_MODE_GPIO, + .gpio4 = GPIO_MODE_GPIO, + .gpio5 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_GPIO, + .gpio11 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_GPIO, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_GPIO, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio2 = GPIO_DIR_INPUT, + .gpio3 = GPIO_DIR_INPUT, + .gpio4 = GPIO_DIR_INPUT, + .gpio5 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_OUTPUT, + .gpio10 = GPIO_DIR_INPUT, + .gpio11 = GPIO_DIR_INPUT, + .gpio12 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_OUTPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio19 = GPIO_DIR_OUTPUT, + .gpio21 = GPIO_DIR_OUTPUT, + .gpio22 = GPIO_DIR_OUTPUT, + .gpio23 = GPIO_DIR_OUTPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio26 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio8 = GPIO_LEVEL_HIGH, + .gpio12 = GPIO_LEVEL_LOW, + .gpio15 = GPIO_LEVEL_HIGH, + .gpio16 = GPIO_LEVEL_LOW, + .gpio19 = GPIO_LEVEL_HIGH, + .gpio21 = GPIO_LEVEL_LOW, + .gpio22 = GPIO_LEVEL_LOW, + .gpio23 = GPIO_LEVEL_HIGH, + .gpio24 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio11 = GPIO_RESET_RSMRST, + .gpio15 = GPIO_RESET_RSMRST, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio1 = GPIO_INVERT, + .gpio2 = GPIO_INVERT, + .gpio4 = GPIO_INVERT, + .gpio5 = GPIO_INVERT, + .gpio7 = GPIO_INVERT, + .gpio14 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_NATIVE, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_NATIVE, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_NATIVE, + .gpio47 = GPIO_MODE_GPIO, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_GPIO, + .gpio51 = GPIO_MODE_GPIO, + .gpio52 = GPIO_MODE_GPIO, + .gpio53 = GPIO_MODE_GPIO, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_GPIO, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_GPIO, + .gpio61 = GPIO_MODE_NATIVE, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_OUTPUT, + .gpio35 = GPIO_DIR_OUTPUT, + .gpio36 = GPIO_DIR_OUTPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio47 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_OUTPUT, + .gpio49 = GPIO_DIR_OUTPUT, + .gpio50 = GPIO_DIR_INPUT, + .gpio51 = GPIO_DIR_OUTPUT, + .gpio52 = GPIO_DIR_OUTPUT, + .gpio53 = GPIO_DIR_OUTPUT, + .gpio54 = GPIO_DIR_OUTPUT, + .gpio55 = GPIO_DIR_OUTPUT, + .gpio56 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio60 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio34 = GPIO_LEVEL_HIGH, + .gpio35 = GPIO_LEVEL_LOW, + .gpio36 = GPIO_LEVEL_LOW, + .gpio48 = GPIO_LEVEL_HIGH, + .gpio49 = GPIO_LEVEL_HIGH, + .gpio51 = GPIO_LEVEL_HIGH, + .gpio52 = GPIO_LEVEL_LOW, + .gpio53 = GPIO_LEVEL_HIGH, + .gpio54 = GPIO_LEVEL_LOW, + .gpio55 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_GPIO, + .gpio65 = GPIO_MODE_GPIO, + .gpio66 = GPIO_MODE_GPIO, + .gpio67 = GPIO_MODE_GPIO, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_NATIVE, + .gpio73 = GPIO_MODE_GPIO, + .gpio74 = GPIO_MODE_GPIO, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio64 = GPIO_DIR_OUTPUT, + .gpio65 = GPIO_DIR_OUTPUT, + .gpio66 = GPIO_DIR_OUTPUT, + .gpio67 = GPIO_DIR_OUTPUT, + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_INPUT, + .gpio73 = GPIO_DIR_INPUT, + .gpio74 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio64 = GPIO_LEVEL_LOW, + .gpio65 = GPIO_LEVEL_LOW, + .gpio66 = GPIO_LEVEL_LOW, + .gpio67 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/apple/macbookpro10_1/hda_verb.c b/src/mainboard/apple/macbookpro10_1/hda_verb.c new file mode 100644 index 0000000000..cfdbcb7e8d --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/hda_verb.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +const u32 cim_verb_data[] = { + 0x10134206, /* Codec Vendor / Device ID: Cirrus CS4206 */ + 0x106b2800, /* Subsystem ID */ + + 11, /* Number of 4 dword sets */ + + AZALIA_SUBVENDOR(0, 0x106b2800), + AZALIA_PIN_CFG(0, 0x09, 0x002b4020), + AZALIA_PIN_CFG(0, 0x0a, 0x90100112), + AZALIA_PIN_CFG(0, 0x0b, 0x90100110), + AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), + AZALIA_PIN_CFG(0, 0x0d, 0x400000f0), + AZALIA_PIN_CFG(0, 0x0e, 0x90a60100), + AZALIA_PIN_CFG(0, 0x0f, 0x400000f0), + AZALIA_PIN_CFG(0, 0x10, 0x004be030), + AZALIA_PIN_CFG(0, 0x12, 0x400000f0), + AZALIA_PIN_CFG(0, 0x15, 0x400000f0), +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/apple/macbookpro10_1/mainboard.c b/src/mainboard/apple/macbookpro10_1/mainboard.c new file mode 100644 index 0000000000..75c58bfbe4 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/mainboard.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +static void mainboard_enable(struct device *dev) +{ + install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, + GMA_INT15_PANEL_FIT_DEFAULT, + GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/apple/macbookpro10_1/spd/2g_hynix_1600.spd.hex b/src/mainboard/apple/macbookpro10_1/spd/2g_hynix_1600.spd.hex new file mode 100644 index 0000000000..1edb657c91 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/spd/2g_hynix_1600.spd.hex @@ -0,0 +1,16 @@ +92 11 0b 03 03 00 00 09 03 52 01 08 0a 00 80 00 +6e 78 6e 32 6e 11 18 81 00 05 3c 3c 00 f0 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 01 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 27 06 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/apple/macbookpro10_1/spd/4g_hynix_1600.spd.hex b/src/mainboard/apple/macbookpro10_1/spd/4g_hynix_1600.spd.hex new file mode 100644 index 0000000000..29fe2200aa --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/spd/4g_hynix_1600.spd.hex @@ -0,0 +1,16 @@ +92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00 +6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/apple/macbookpro10_1/spd/Makefile.inc b/src/mainboard/apple/macbookpro10_1/spd/Makefile.inc new file mode 100644 index 0000000000..139b143ec2 --- /dev/null +++ b/src/mainboard/apple/macbookpro10_1/spd/Makefile.inc @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-only + +SPD_SOURCES = 2g_hynix_1600 # 0b0111 +SPD_SOURCES += 4g_hynix_1600 # 0b1001 -- cgit v1.2.3